Keynote Speaker


Tuesday, October 13, 2020

9:00am US Pacific Time

Trends, Challenges, Opportunities in Advanced Packaging

for Smart Computing Era






Dan Oh, Ph.D.

Engineering VP of the Test & System Package (TSP)
Samsung Electronics


The AI-driven smart computing era pursues computer performance and reduced power consumption. Advanced packaging technology achieves these goals by integrating logic and memory chips at closer proximities.

This talk portrays how semiconductor technology has evolved from the system integration perspective, and then, it describes some of the future integration schemes which will provide yet another scaling path to modern Silicon-based IC technology. However, extreme integration technology scaling by combining package-level, wafer-level, and fab process-level integration technologies results in problems with high-power density.

To address the challenges in providing power and extracting dissipated heat from highly integrated systems, potential innovative solutions in signal, power, and thermal designs are also examined.


About the Speaker: 

Dr. Dan Oh is an Engineering VP of the Test & System Package (TSP) unit at Samsung Electronics.

He is responsible for developing signal and power integrity and thermal solutions for memory, S. LSI and foundry devices.From 2016 to the end of 2019, Dr. Oh led the Package Development department responsible for both research and development of entire Samsung products. During this time, Dr. Oh helped establish an advanced wafer-level packaging laboratory for developing high-end server products such as 2.5D Silicon/RDL interposers, FO-WLP and 3D TSV devices. He also helped research and grow FO-PLP technology for consumer and mobile products commercializing the world’s first FO-PLP product for the Galaxy watch. Dr. Oh received his Ph.D. in electrical engineering from the University of Illinois, Urbana-Champaign in 1995. He has over 30 years of experience in the packaging and signal and power integrity fields with multiple high-tech companies, including Intel, Rambus, and Synopsis. His dedication to his work has led to over 90 patents, patent applications, and over 160 published papers in IEEE journals and conferences. He is also the lead author of the book High-speed Signaling: Jitter Modeling Analysis and Budgeting