International Wafer-Level Packaging Congress 2005 Proceedings

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TITLE AUTHOR
TAILORING THE COEFFICIENT OF THERMAL EXPANSION OF A PRINTED CIRCUIT BOARD OR INTEGRATED CIRCUIT SUBSTRATE Carol Burch, Kris Vasoya  Abstract
ULTRA LOW PROFILE 3-D CUBE WITH WAFER LEVEL PACKAGING TECHNIQUE Christian VAL  Abstract
POST-PROCESS SILICON THROUGH VIAS TECHNOLOGY WITH LOW ELECTRICAL RESISTANCE D. Henry, J-C. Souriau, C. Brunet-Manquat, C. Puge  Abstract
DEVELOPMENT AND SCREENING OF POLYMER COLLAR WLP1 CANDIDATES FOR LEAD-FREE SOLDER SPHERE TECHNOLOGY TO ENHANCED RELIABILITY David Luttrull et al.  Abstract
UBM FOR MEMS, OEMS AND CMOS Donald Gudeczauskas  Abstract
THE DESIGN CRITERIA FOR A FULLY AUTOMATED ELECTROLESS PLATING TOOL Doug Stewart  Abstract
WLP AND THE DRIVERS FOR THE CONVERGENCE OF FAB AND ASSEMBLY PROCESSING E. Jan Vardaman  Abstract
EFFECT OF UNFILLED UNDERFILL ON BOARD LEVEL RELIABILITY OF AREA ARRAY PACKAGES Edward S. Ibe et al.  Abstract
DROP TEST PERFORMANCE OF LEAD FREE FBGA PACKAGES Flynn Carson & Tae Sung Jeong  Abstract
LOW COST WAFER-LEVEL CAVITY PACKAGE G. Humpston and D.B. Tuckerman  Abstract
SCALING UP RFID MANUFACTURING – ADDRESSING THE NEED FOR HIGH VOLUME PRODUCTION Gerald Steinwasser  Abstract
ELECTROPLATED COPPER AND COPPER ALLOYS FOR WAFER LEVEL PACKAGING Igor S. Zavarine, Xuan Lin, Chonglun Fan and Yun Z  Abstract
SCREEN PRINTABLE POLYMERS FOR WAFER LEVEL PACKAGING: A TECHNOLOGY ASSESSMENT James Clayton and Michael J. Hodgin  Abstract
MEMS WAFER-LEVEL PROCESSES Ken Gilleo, Ph.D.  Abstract
FLIP CHIP QUAD FLAT NO-LEAD (FC-QFN) Kevin Chang, Jen Yuan Lai, Hanping Pu, Yu-po Wang,  Abstract
LEAD FREE BUMPING USING C4NP RELIABILITY AND COST INFORMATION - EXTENDED ABSTRACT Klaus Ruhmer et al.  Abstract
ELECTRONICS ON DEFORMABLE ULTRA-THIN SUBSTRATES M. Bartek et al.  Abstract
LATEST DEVELOPMENTS IN DRIE FOR INTEGRATION OF PASSIVE COMPONENTS AND WAFER-LEVEL PACKAGING M.Puech, B. Andrieu, L.Popin, N.Launay, N.Arnal, P  Abstract
THE DEVELOPMENT OF BALLING TECHNOLOGIES FOR WAFER LEVEL DEVICES WITH PITCHES DOWN TO 0.4MM (Conducted as part of the Blue Whale Consortium Project) Mark Whitmore et al.  Abstract
STACKED PACKAGE ON PACKAGE (PoP) DESIGN GUIDELINES Moody Dreiza, Lee Smith, Akito Yoshida, and Jonath  Abstract
ELECTROPLATING OF Cu THROUGH ELECTRODES IN 3D PACKAGING N. Saito, R. Kiumi, and F. Kuriyama  Abstract
ELECTROPLATING OF LEAD-FREE BUMPS ON 300mm WAFERS FOR WLP APPLICATIONS N. Saito, R. Kiumi, F. Kuriyama, and K. Kamimura  Abstract
REPAIRABLE 3D SEMICONDUCTOR SUBSYSTEM Peter C. Salmon  Abstract
A PRACTICAL ELECTROLYTE FOR THE ELECTRODEPOSITION OF EUTECTIC GOLD-TIN ALLOY Prof. George Hradil  Abstract
WAFER-LEVEL VIA-FIRST 3D INTEGRATION WITH HYBRID-BONDING OF Cu/BCB REDISTRIBUTION LAYERS R.J. Gutmann, J.J. McMahon, S. Rao, F. Niklaus and  Abstract
IN-PROCESS BUMP INSPECTION CAN BOOST YIELDS AND DETECT UNDERLYING PROCESS ISSUES Rajiv Roy and Tim Schafer  Abstract
INLINE PROCESS CONTROL OF ORGANIC WAFER LEVEL PACKAGES INCREASES YIELD BY DETECTING DEFECTS ON RESIST AND METAL LAYERS AND RESIDUE IN VIAS AND ON BUMP Robert Bishop, Ph.D.  Abstract
THE ADVANCES OF ELECTROLESS Ni/Pd/Au METAL STACK AS UBM FOR FLIP CHIP TECHNOLOGY Robert Preisser  Abstract
MULTICOMPONENT IC PACKAGING Sandra L. Winkler  Abstract
THE U-PROS CONTACTING TECHNOLOGY: A BREAKTHROUGH IN WLP Silvano Mezzetti  Abstract
3D PACKAGING VIA ADVANCED-CHIP-TO-WAFER (AC2W) BONDING ENABLES HYBRID SYSTEM-IN-PACKAGE (SiP) INTEGRATION Stefan Pargfrieder et al.  Abstract
MEAN TIME TO FAILURE IN WAFER LEVEL-CSP PACKAGES WITH SnPb AND SnAgCu SOLDER BUMPS Stephen Gee and Luu Nguyen et al.  Abstract
EVALUATION OF A NANO-PARTICLE METAL AS AN INTERCONNECT FOR ELECTRONICS PACKAGE PROTOTYPING Sungchul Joo and Daniel F. Baldwin  Abstract
ADVANCED ASSEMBLY PROCESS DEVELOPMENT FOR ULTRA FINE PITCH WAFER LEVEL PACKAGING Sungmin Suh and Daniel Baldwin, Ph.D.  Abstract
WAFER-LEVEL-PACKAGING, 3D INTEGRATION AND WAFER-LEVEL LAYER TRANSFER PROCESSES THROUGH ALIGNED WAFER BONDING Thorsten Matthias et al.  Abstract
LOW COHERENCE METROLOGY FOR WAFER LEVEL PACKAGING Wojtek J. Walecki, Talal Azfar, Alexander Pravdivt  Abstract
GOOD THINGS COME IN SMALL PACKAGES: DEVELOPMENT OF WAFER LEVEL PACKAGING TECHNOLOGY Yogi Ranade, Prashant Singh and Anwar Ali  Abstract
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