Pan Pacific Symposium 2010 Proceedings

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TITLE AUTHOR
NANOTECHNOLOGY IS NOW STARTING TO FIND APPLICATIONS IN ELECTRONICS Alan Rae  Abstract
QUANTITATIVE ANALYSES OF INTERFACIAL PROPERTIES OF Cu-Cu BONDS FOR TSV INTEGRATION Bioh Kim, et al.  Abstract
MOLDED INTERCONNECT DEVICES – PROGRESSIVE APPROACH FOR MECHATRONIC PRODUCTS AND EFFICIENT MANUFACTURING PROCESSES Christian Goth, et al.  Abstract
NEW PACKAGING AND INTERCONNECT TECHNOLOGIES FOR ULTRA THIN CHIPS Christine Kallmayer, Rolf Aschenbrenner, Julian Haberland and Herbert Reichl  Abstract
DPBO – A NEW CONTROL CHART FOR ELECTRONICS ASSEMBLY Daryl L. Santos, Ph.D.  Abstract
ON IMPROVING OPERATIONS SCHEDULING IN ELECTRONICS MANUFACTURING Daryl L. Santos, Ph.D.  Abstract
HOW IT CAN ENABLE ENERGY OPTIMIZATION: A CASE STUDY ON TEXTILE FACTORIES Eugenio Capra, Chiara Francalanci, Daniele Zagordi, and Alex Zazzera  Abstract
A SURVEY ON IT MANAGERS GREEN AWARENESS Eugenio Capra, Ph.D., and Alessandro Caleffi  Abstract
MODERN 2D / 3D X-RAY INSPECTION - EMPHASIS ON BGA, QFN, 3D PACKAGES, AND COUNTERFEIT COMPONENTS Evstatin Krastev and David Bernard  Abstract
FROM THE SINGLE CHIP TO THE WAFER INTEGRATION Gilles Poupon, Jean Charles Souriau, Hervé Boutry, Jean Brun, and Nicolas Sillon  Abstract
EMERGING COMPETITORS IN EMERGING MARKETS: WHAT PATENT APPLICATIONS REVEAL H. J. Neuhaus, Ph.D., R. A. Fillion, and C. E. Bauer, Ph.D.  Abstract
ELECTROSTATIC DISCHARGE (ESD) – SOURCES OF ELECTROSTATIC CHARGE IN A PRODUCTION LINE (SMT) Hartmut Berndt  Abstract
EMERGING SUBSTRATE TECHNOLOGIES FOR PACKAGING Henry H. Utsunomiya  Abstract
CAPILLARY UNDERFILL PHYSICAL LIMITATIONS FOR FUTURE PACKAGES Horatio Quinones and Tom Ratledge  Abstract
ADVANTAGES OF A NEW WAFER LEVEL INTEGRATION CONCEPT BASED ON DIRECT BONDED SILICON ON LTCC J. Müller, et al.  Abstract
A CATALOGUE OF FAILURE MECHANISMS IN FLIP CHIP DEVICES DETECTED USING ACOUSTIC MICRO IMAGING Janet E. Semmens  Abstract
HEAD STACK ASSEMBLY PERCUSSION SWAGE PROCESSING MORPHOLOGIES FOR HARD DISK DRIVE PRODUCTS Jeffry S. Bennin and Michael R. Tiller  Abstract
HIGH THERMAL MASS, VERY HIGH LEAD COUNT SMT CONNECTOR REWORK PROCESS: PROCESS AND PROBLEM RESOLUTION Jim Bielick, et al.  Abstract
MECHANICAL FAILURES IN PB-FREE PROCESSING: EVALUATING THE EFFECT OF PAD CRATER DEFECTS ON PROCESS STRAIN LIMITS FOR BGA DEVICES John McMahon and Brian Gray  Abstract
USING TEST OPTIMIZATION TO IMPROVE REWORK EFFECTIVENESS Juan Coronado, et al.  Abstract
CORROSION DRIVEN WHISKER GROWTH IN SAC305 Keith Sweatman, Junya Masuda, Takashi Nozu, Masuo Koshi, and Tetsuro Nishimura  Abstract
HIGH SPEED TOUCH SCREEN ASSEMBLY USING ANISOTROPIC CONDUCTIVE ADHESIVES (ACAS) VERTICAL ULTRASONIC BONDING METHOD Kyung-Wook Paik, Seung-Ho Kim, and Kiwon Lee  Abstract
SILICON INTERPOSER FOR HETEROGENEOUS INTEGRATION M. Juergen Wolf, et al.  Abstract
HIGH BRIGHTNESS LED ASSEMBLY USING DPC SUBSTRATE AND SUPERMCPCB Nick Wang, et al.  Abstract
LEAD-FREE FLUX TECHNOLOGY AND INFLUENCE ON CLEANING Ning-Cheng Lee, Ph.D.  Abstract
CHIP-LAST INTERCONNECTION TO THIN ORGANIC PACKAGES WITH ADVANCED DILECTRICS AND FINE PITCH I/OS Rao R. Tummala, Ph.D., Venkatesh Sundaram, Ph.D., Nitesh Kumbhat, and Nithya Sankaran  Abstract
SOLAR CELLS ON ULTRA-THIN CRYSTALLINE SILICON Robert Mertens, Ph.D.  Abstract
IMPORTANT CONSIDERATIONS IN PACKAGING A SMALL HALL-EFFECT SENSOR Ron Molnar and Jeff Wise  Abstract
QUALITY AND RELIABILITY ANALYSIS OF LEAD FREE PCBs IN SIMULATED PRODUCTION CONDITIONS AND LONG TERM USE Sammy Shina, Ph.D., et al.  Abstract
OPTIMIZATION OF COPPER PLATING PARAMETERS FOR FAST FILLING OF THROUGH SILICON VIAS (TSV) Su Wang and S. W. Ricky Lee  Abstract
MICRON LEVEL PLACEMENT ACCURACY FOR HIGH ASPECT RATIO DIE IN PRINTING PRODUCTS Zeger Bok and Daniel D. Evans, Jr.  Abstract
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