International Wafer-Level Packaging Conference 2016 Proceedings

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    Wafer-Level Vacuum Packaging of Microbolometer-Based Infrared Imagers Allan Hilton, Dorota S. Temple, John Lannon, Thomas R. Schimert, George Skidmore, Roland Gooch, Carlos Trujillo, Scott Miskimins, Chuan Li  Purchase 
    Thin Wafer Handling Technologies for TSV Packaging Amandine Pizzagalli, Santosh Kumar, Thibault Buisson  Purchase 
    Fabrication and Reliability of a Thermally Enhanced Wafer Level Fan Out Demonstrator André Cardoso, Hugo Barros, Gusztáv Hantos  Purchase 
    Understanding and Solving The Challenges of Chip To Package Co-Design For Fo-WLP Bill Acito  Purchase 
    Silicon Wafer Integrated Fan-Out Technology Bora Baloglu, Ph.D., George Scott, and Curtis Zwenger  Purchase 
    SIP Assembly With Sintering Paste In FO-WLP Catherine Shearer  Purchase 
    Cost Analysis of Die Assembly For 2.5D and 3D Packaging Chet A Palesko and Amy P Lujan  Purchase 
    High Productivity UBM/RDL Deposition by PVD for FOWLP Applications Chris Jones, David Butler, Steve Burgess, Tony Wilby, Paul Densley  Purchase 
    Wafer-Level Vacuum-Packaged 2-Axes MEMS Gyroscope with High Yield Rate ChungMo Yang, JongCheol Park, TaeHyun Kim, KilSon No, ChangHo Seo, NamSu Park, GapSeop Shim, SungKyu Lim, HeeYeoun Kim  Purchase 
    Key Criteria For Successful Integration of Laser Debonding Elisabeth Brandl, Thomas Uhrmann, Jürgen Burggraf, Martin Eibelhuber, Harald Wiesbauer, Mariana Pires, Philipp Kolmhofer, Matthias Pichler, Julian Bravin, Markus Wimplinger and Paul Lindner  Purchase 
    Ultrathin WLFO Eoin O`Toole, Steffen Kroehnert, José Campos, Virgilio Barbosa, Leonor Dias  Purchase 
    Wafer Level Encapsulation-An Alternative Format For Discrete Packaging: Its Challenges and Solutions Eric Kuah, Hao JY, WL Chan, Wu Kai, CT Ong and Nelson Fan  Purchase 
    Addressing the Needs of RDL/UBM Processing in FOWLP Frantisek Balon Ph.D., Patrick Carazzetti Ph.D., Juergen Weichart Ph.D., Mohamed Elghazzali, Mike Hoffmann, Kay Viehweger  Purchase 
    Ultra Thin Substrate Assembly Challenges For advanced Flip Chip Package Fred Lee*, Jianjun Li*, Bindu Gurram* Nokibul Islam, Phong Vu, KeonTaek Kang**, HangChul Choi**  Purchase 
    Miniaturizing RF Module Using Class Interposer Technology Ganesh Bhatt  Purchase 
    Development of High Density Fan Out (HD-FO) Package Platform for High Performance and RF Applications Gaurav Sharma, Adam Beece, Gao Shan and Marcel Wieland  Purchase 
    A Practical Approach to Test Through Silicon Vias (TSV) Gerard John  Purchase 
    Direct Bond Interconnect (DBI®) Technology As An Alternative to Thermal Compression Bonding Guilian Gao, Ph.D., Gill Fountain, Paul Enquist, Ph.D., Cyprian Uzoh, Liang Frank Wang, Ph.D., Scott McGrath, Bongsub Lee, Ph.D., Willmar Subido, Sitaram Arkalgud, Ph.D., Laura Mirkarimi, Ph.D.  Purchase 
    Full-Field Projection Scanner Pattering Resolution and Overlay Performance Habib Hichri, Markus Arendt, Eric Nguyen, William Vis  Purchase 
    Wafer Level Process Formation of a Polymer Isolated Chip Scale Package Harry Gee, et al.  Purchase 
    AuSn Eutectic Bonding For Wafer-Level Hermetic Packaging Using A Novel AuSn Patterning Process Hiroyuki Ishida, Takuya Yazaki, Hiroyuki Kusamori, Tomohiro Shimada, Takeshi Iribe, and Kenichi Miyazaki  Purchase 
    Low Cost Electrical Interconnect for 3D Fan Out Wafer Level Packaging Ivy Qin, Ph.D., Horst Clauberg, Ph.D., Bob Chylak, Oranna Yauw, and Favian Neo  Purchase 
    Rapid Polymer Curing For Improved Manufacturing Metrics J. Yusi, B. Rogers, R. Valencia, C. Sandstrom, C. Scanlan, and T. Olson  Purchase 
    Wafer Level System in Packaging (SIP) Technologies As 2, 3D Module/ System Integration Solution Jong Heon KIM, Yong Tae KWON, Eung Joo LEE, JK Lee, Seo Hee LEE  Purchase 
    The Novel Liquid Molding Compound For Fan-Out Wafer Level Package Katsushi Kan, Yosuke Oi, Yasuhito Fujii, Masato Miwa, and Michiyasu Sugahara  Purchase 
    Advanced Packaging Lithography and Inspection Solutions for Next Generation FOWLP-FOPLP Processing Keith Best, Gurvinder Singh, and Roger McCleary  Purchase 
    Photolithography Alignment Mark Transfer System for Low Cost Advanced Packaging and Bonded Wafer Applications Keith Best, Steve Gardner, and Casey Donaher  Purchase 
    3D-Wafer Level Packaging for MEMS by Using a Via Middle Approach Based On Copper Through Silicon Vias Combined With Copper Thermo-Compression Bonding L. Hofmann, M. Baum, I. Schubert, M. Küchler, R. Ecke, M. Wiemer, Navien K. Devadass, S.E. Schulz, T. Geßner  Purchase 
    Development of Bump Support Film (BSF) For Improving Package Reliability of WlCSP Masanori Yamagishi, Shinya Takyu, Naoya Saiki, Akinori Sato, Kazuyuki Tamura and Rey Alvarado  Purchase 
    Package-On-Package Interconnect For Fan-Out Wafer Level Packages Min Tao, Ph.D, Akash Agrawal, Ashok Prabhu, Ilyas Mohammed, Ph.D, Belgacem Haba, Ph.D  Purchase 
    Sub-µM 3D For RDL Structures In FO-WLP and Advanced Packaging Using Mult-Sensor Interferometry Moritz Jurgschat, Matthias Weber and Ramon Tuason  Purchase 
    High Speed Interfaces Between Chips Mounted With Different Integration Technologies On an Interposer Muhammad Waqas Chaudhary, Andy Heinig  Purchase 
    TSV Assembly: Package Architectures and Trade-offs Paul Silvestri, Rama Alapati, Mike Kelly  Purchase 
    Multi Beam Full Cut of Molded Wafer Level Chip-Scale Package Richard Boulanger, Jeroen van Borkulo, Eric M.M. Tan.  Purchase 
    Advanced Detection and Removal Method of Polymer Residues On Semiconductor Substrates Richter H., Pfitzner L., Bauer A., Pfeffer M. and Bodner T., Siegert J.  Purchase 
    FOWLP: Comparison & Highlight On The Last Technologies Trends Romain Fraux  Purchase 
    Ultra-Thin Gold Passivation as a Viable Alternative for Achieving Low Temperature Low Pressure Cu-Cu Thermo-Compression Bonding Satish Bonam*, Asisa Kumar Panigrahi, Shikhar Jain, Siva Rama Krishna Vanjari, Shiv Govind Singh  Purchase 
    Defining The Quality Line Selim S Nahas1, Yao Hong Tan2, Manan Dedhia3  Purchase 
    Chip/Package Co-Analysis of Thermal-Induced Stress For Fan-Out Wafer Level Packaging Stephen Pan, Zhigang Feng, Norman Chang  Purchase 
    Electroplated Nano Twinned Copper For Wafer Level Packaging Stream Chung, Ph.D., Zong-Cyuan Chen, and Yao-Zong Chen and Yi-Cheng Chu, Kuan-Ju Chen, Chih-Han Tseng, and Chih Chen, Ph.D.  Purchase 
    System-In-Package (SiP) Assembly vs Solder Paste Attributes Sze-Pei Lim, Kenneth Thum, Andy Mackie, Ph.D.  Purchase 
    Novel WLCSP Technology Solution for Fusion Device of CMOS Integrated Circuit with MEMS Takahide Murayama, Toshiyuki Sakuishi, Yasuhiro Morikawa  Purchase 
    Application of 3D X-Ray Microscopy For 3D IC Process Development Teng Wang, Ingrid De Wolf, Allen Gu, Raleigh Estrada, Steve Kelly  Purchase 
    Advances and Applications of Gold Electroplating to Semiconductor Devices Theresa Souza, Anthony Gallegos, Tom Tyson, Bob Forman, Lynne Michaelson, Ph.D.  Purchase 
    Patterned Adhesive Transfer for Wafer Level Packaging Applications Thomas Uhrmann, Elisabeth Brandl, Jürgen Burggraf, Christine Thanner and Markus Wimplinger  Purchase 
    Process Controls For Advanced Thermocompression Bonding Tom Strothmann  Purchase 
    Electrodeposition of Ø50 × 50 µm Cu Pillars for 3D Stacking Applications Zaid El-Mekki, Harold Philipsen, Mia Honore, Aleksandar Radisic, John Slabbekoorn, Herbert Struyf, Marco Arnold, Alexander Fluegel, Dieter Mayer, Iris Shu-Ya Chang  Purchase 

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