Journal of SMT Article

AUTOMATING UNDERFILL FOR NON-TRADITIONAL PACKAGES, SECONDARY CSP UNDERFILL, STACKED DIE, AND NO-FLOW UNDERFILL

Author: Al Lewis
Company: Asymtek
Date Published: 7/1/2000   Volume: 13-3

Abstract: Using flip chip on board (FCOB) in standard SMT production lines has been an elusive target. The drivers for using flip chip are high performance, low cost, small size and have excellent thermal characteristics. The detractors for flip chip have been KGD, handling, bumping, and basic infrastructure for integrating bare die into standard PCBA production lines.

Several drivers are placing the underfill process in packages other than the FCOB and FC in package. As more OEMs focus on intellectual property and divest manufacturing technology to the contract manufacturers, the need for the benefits of FCOB have not gone away. CSP packages promised to be the bridge to FCOB bringing low cost, easy handling, and SMT line compatibility. CSPs are designed to meet the thermal cycling reliability goals without underfilling. However the handheld personal communications device, which is one of the key platforms for CSP components, uncovered an unforeseen reliability issue. Personal devices are dropped. The mechanical shock, dynamic and static loading on the CSP initiate a mechanical failure mechanism. The solution to the problem is secondary underfill. The new underfill applications have many similarities to traditional underfill techniques but the fluid volumes, material composition, surrounding PCB components and packaging constraints bring about a new set of dispensing parameters. Also, the effect of voids in secondary underfill is different than FCOB. Some of the manufacturing considerations include working around RF shielding and differences in the underfill gap from traditional flip chip packages. This paper explores the reasons and boundaries for secondary underfill and the dispensing techniques and materials to ensure a reliable electronics package.

Another package that uses underfill techniques is the stacked die package. Low cost, low IO, small footprint memory chips that are stacked require underfill between the die for reliability. While these packages are not high power devices, they are required to meet reliability requirements of thermal cycling and mechanical shock. This package, wire bonded or placed in a surface mount device, has manufacturing process and reliability requirements that also differ from the traditional flip chip package.

Flip chip packages designed for use with no-flow underfill materials also produce a different set of dispensing requirements. While these packages have yet to gain widespread acceptance, the industry continues to develop the process because of the promise of less expensive manufacturing cost. It is clear that this niche for this process exists. Some of the issues surrounding the manufacturing requirements for dispensing are discussed in terms of their uniqueness and the techniques that can be borrowed from other packaging techniques, such as traditional heat sink and die attach.

Keywords: Flip Chip, CSP, Stacked Die, No-Flow Underfill, Automated Dispensing.



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