Journal of SMT Article


Author: Kwang-Seong Choi et al.
Company: LG Semicon Company, Ltd.
Date Published: 1/1/1999   Volume: 12-1

Abstract: The bottom-leaded plastic (BLP) package is a leadless chip scale package (CSP) using a structure that is readily manufacturable with versatile wire bonding and the existing infrastructure. The design optimization to improve solder joint reliability and its experimental verification are the key issues of this paper. The new BLP design features include micro-holes on the trim fine, which leave a plated surface at the trimmed edge.

This has resulted in a more reliable solder joint shape which was confirmed by the accelerated thermal cycling (ATC) test. The effects of coefficients of thermal expansion (CTEs) of substrates and of double-sided mounting on solder joint reliability of the BLP package were examined. Also, the effect of reflow times will be reported. Finally, as reliability enhancements, the BLP with copper lead frame and D2CSP will be introduced.

Key words: BLP, design optimization, solder joint reliability, ATC test, D2CSP.

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