icon are recognized as Speakers of Distinction. Over the past 15 years they have been identified by SMTAI attendees as giving the strongest technical presentations. Congratulations to each of these authors for a job exceptionally well done.

MONDAY, October 15
8:30am - 10:00am

ET1

PCB Embedded Technology - The Development, Application and Reliability

Chair: Paul Wang, Ph.D., Mitac International Inc.
Co-Chair: Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
Monday, October 15 | 8:30am – 10:00am | Asia 1

The embedded active component into printed circuit board is an emerging technology (ET) being developed to meet the needs of the next generation of microelectronics systems. Embedded passives; however, are relatively more mature even though still there are significant implementation challenges for their wider acceptance. In this session, investigators from Europe will present the most recent activities on these technologies covering applications for smart phone, tablet and automotive electronics. Assembly and reliability are major challenging in developing of this emerging technology that will be discussed in details.

Integration of Electronic Components Into PCB for Electromobility Application
Thomas Hofmann, Stefan Gottschling, Continental AG

Development of Embedded Power Electronics Modules for Automotive Applications
*L. Böttcher, S. Karaszkiewicz, A. Ostmann, Fraunhofer Institute for Reliability and Microintegration (IZM); D. Manessis, Technical University of Berlin

Embedding and Reliability of Discrete Capacitors Into Build Up Layers of Printed Circuit Boards
Thomas Löher, Joao Marques, Technical University of Berlin; Martin Haubenreisser, Andreas Ostmann, Fraunhofer Institute for Reliability and Microintegration (IZM); Norbert Bauer, Murata Elektronik GmbH

HE1

Pb-Free Solders for Sustained Elevated Temperature Service

Chair: John Evans, Ph.D., Auburn University
Co-Chair: Mike Bixenman, DBA, Kyzen Corporation
Monday, October 15 | 8:30am – 10:00am | Australia 3

The implementation of Pb-free solder solutions has become a mainstream activity within the consumer electronics market. However, it has just recently begun to branch out into the high-reliability electronics sector. A particular challenge for these products is the need for them to operate in harsh environment – temperature extremes, shock, vibration, etc. There has been a great deal of progress made to fit Pb-free interconnections into these applications as is reflected by the four presentations in this session. The first paper examines a relatively new solder paste system having a BiAgX metal component that is targeted to replace the high-Pb solders used in die attach functions. Metal materials are preferred for thermal management as well as for posing a minimal outgassing concern. The second presentation will address the the long-term performance of Pb-free solder joints used on passive components and active devices. The final two papers of the session investigate the role that long-term exposure to elevated temperatures has on the mechanical performance of Pb-free interconnections. Creep behavor, as the underlying property that controls deformation under these temperature conditions, will be observed to uniquely alter the overall behavior of the solder joint, depending on the latter’s materials set and geometry. This session is invaluable to the engineer tasked with looking at Pb-free solder solutions that will fit into applications having extreme environments.

Reliability of BiAgX Solder as a Drop-in Solution for High Temperature Lead-Free Die Attach Applications
*Ning-Cheng Lee, Ph.D., HongWen Zhang, Ph.D., Indium Corporation

Reliability of Passive and Active Components with Differences According to Lead-Free Paste Characterization
Jörg Trodler, Heraeus Materials Technology GmbH & Co. KG

Isothermal Aging Effects on the Harsh Environment Performance of Lead-Free Solder Joints
Jiawei Zhang, Ph.D., Zhou Hai, Sivasubramanian Thirugnanasambandam, John L. Evans, Ph.D., M. J. Bozack, Richard Sesek, Center for Advanced Vehicle and Electronics - Auburn University

MONDAY, October 15
11:00am - 12:30pm

ET2

Advanced Materials and Printing

Chair: Paul Vianco, Ph.D., Sandia National Laboratories
Co-Chair: Lars Bottcher, Fraunhofer Institute for Reliability and Microintegration (IZM)
Monday, October 15 | 10:30am – 12:00pm | Asia 1

Emerging technologies often have, as their underpinning, advanced processing concepts and novel materials sets. This session explores both aspects, beginning with the presentation by X. Chen of nScrpyt, Inc. that will describe the direct printing technique for constructing monolithic RF transmitters. That paper is followed with a discussion by A. Rae who will examine new processing techniques that are being developed over the range of electronic packaging technologies. The session concludes with the paper by X. Lei of Electrolube, Ltd. This presentation will describe new polyurethane encapsulating resins that are non-isocyanate, non-mercury based compositions. These new resins are more adaptable to manufacturing processes and considerably friendlier to the environment.

Process Developments for Micro-Electronics Packaging With Direct Printed Additive Manufacturing
R.X. Rodriguez, K. Church, Ph.D., W.M. Keck, Center for 3D Innovation, University of Texas at El Paso; X. Chen, nScrypt, Inc.

Novel Processing Methods for Electronic Materials
Speaker of Distinction

Alan Rae, Ph.D., NanoMaterials Innovation Center

Non-isocyanate, Non-mercury Polyurethane Encapsulation Resins
Xiaoping Lei and Darren Hodson, Electrolube, Ltd.

HE2

Experimental Determination and Modeling of Materials for High Reliability Devices

Chair: Brian Toleno, Ph.D., Henkel Electronic Materials LLC
Co-Chair: Robert Kinyanjui, Ph.D., John Deere Electronic Solutions
Monday, October 15 | 10:30am – 12:00pm | Australia 3

Surface mount technology devices are used in a many different applications with a variety of reliability requirements. In order to determine the reliability of such complex devices there needs to be an understanding of each of the major structures that go into these devices. In this session the performance and reliability of PCB laminates, soldermasks, silicone encapsulant materials, and components will be discussed.

Electrical Performance Evaluation of High-Frequency Laminates as a Function of Temperature
Brian Wright, Agilent Technologies

Reliability Assessment of SMT Assembly with Prediction of its Board-Level Interconnect Life Distribution
Jingsong Xie, Ph.D.,Haiyu Qi, Ph.D., RelEng Technologies, Inc.; Jun-Ke Zhang, Feng-Hua Zhou, Chun-Yong Tang, Jaccy Wang, Huawei Technologies Co., Ltd.; Ding-Jun Xie, LiLi Chen, Chang Wang, Beihang University

Designing a Silicone System to Reduce Permeability to Moisture
Julie Harber and Michelle Velderrain, NuSil Technology, LLC

MONDAY, October 15
1:30pm - 3:00pm

ET3

Technology Roadmaps of Our Ever-Changing Future

Chair: Steve Greathouse, Plexus Corporation
Co-Chair: Irene Sterian, P.E., Celestica Inc.
Monday, October 15 | 1:30pm – 3:00pm | Asia 1

Without a Roadmap, how do you know where you are going? This applies to every type of strategic decision that you are asked to make. What technologies are going to be needed next year, in two, five, or ten years? What do I have my limited engineering resources work on to put our company in a position of leadership or competiveness in the future. What areas are going to be "HOT", or is my current factory or product expertise becoming outdated? Where do I encourage investment or throttle back? Do I expand or just hold tight to where I am right now? All of these questions and many more can be answered by knowing and understanding the roadmaps that have been put together by the industry consortiums. The session will have speakers from some of the leading edge roadmap teams in the industry. Don’t miss out on this session if you want to find out what you will be working on in your future!

iNEMI (International Electronics Manufacturing Initiative)
Chuck Richardson – iNEMI Board

ITRS (International Technology Roadmap for Semiconductors)
Alan Allan, Intel Corporation

HE3

Testing and Failure Mechanisms in Harsh Operational Environments

Chair: Tom Borkes, The Jefferson Project
Co-Chair: Mitchell Ferrill, IBM Corporation
Monday, October 15 | 1:30pm – 3:00pm | Australia 3

Designing and assembling an electronic product that "works" is a necessary, but certainly not a sufficient condition for product success. The product must perform to specification over its designated lifetime. This becomes more challenging if the product lifetime contains harsh environmental loading and exposure. Presented in this session are three leading edge papers that address a range of harsh conditions and corresponding design, assembly and test methodologies for printed circuit board assemblies – from a design and process parametric study of creep corrosion, to surviving 50,000g shock loading using compliant interconnects. Finally, a paper is presented that provides a more accurate predictive model through an Innovative accelerated life testing strategy.

iNEMI Creep Corrosion Project: Investigation of Factors That Influence Creep Corrosion on Printed Circuit Boards - Part 2
Anil Kurella, Ph.D., Intel Corporation; PJ Singh, IBM Corporation; Jennifer Burlingame, Cisco Systems; Haley Fu, iNEMI; Cherie Chen, IST; Simon Lee, Dow Chemical

Area-Array Electronics Models and Survivability Under 50,000G Shock Loads
*Pradeep Lall, Ph.D., Kewal Patel, Ryan Lowe, Auburn University; Mark Strickland, Dave Geist, Randall Montgomery and Jim Blanche, NASA Marshall Space Flight Center

Alternative Testing Methods for Electronic Assemblies
Mathias Nowottnick, Andrej Novikov, University of Rostock; Dirk Schade, Bob Sykes, XYZTEC BV

MONDAY, October 15
3:30pm - 5:00pm

ET4

Panel

Chair: Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
Co-Chair: Paul Wang, Ph.D., Mitac International Inc.
Monday, October 15 | 3:30pm – 5:00pm | Asia 1
FREE BEER AND PRETZELS!

Come and join the team of industry experts to learn the roadmap of where the technology is heading and the current key specific issues in packaging, active embedded packaging technology, 3D/TSV, surface mount materials/nanomaterials, solar, manufacturing, Pb-free especially for high reliability applications. Experts from industry will first open discussion present an overview of current and future technology, current status of solar and the SMT relationship, as well as a special presentation on challenges of embedded capacitors. Bring your challenging issues/questions from work to get answers from experts who provide unique perspectives based on their experience.

Component Packaging Technology
*Steve Greathouse, Plexus Corp.

Embedded Active Devices
*Lars Bottcher, Fraunhofer Institute for Reliability and Microintegration (IZM)

Nanomaterials
*Alan Rae, Ph.D., nanoMaterials Innovation Center

Packaging/Solar to Meet Customer Needs
Irene Sterian, P.E., Celestica Inc.

3D/TSV Packaging
Charles Woychik, Ph.D., Invensas Corporation

Lead-Free
*Paul Vianco, Ph.D., Sandia National Laboratories

Roadmap
Chuck Richardson, iNEMI

HE4

Screening and Prolonged Operation for Harsh Environments

Chair: Pradeep Lall, Ph.D., Auburn University
Co-Chair: Mumtaz Bora, Peregrine Semiconductor
Monday, October 15 | 3:30pm – 5:00pm | Australia 3

Electronic systems operating in harsh environments may often undergo prolonged exposure to high temperature and humidity for extensive periods of their operational life. Screening for latent defects and active failure mechanisms encountered in such mission critical systems may often be very different from those in typical consumer electronics. This session focuses on the general theme of screening, and failure mechanisms under prolonged operation. The first paper presents method for reduction in burn-in energy costs based on insights from weibull distributions. The second paper presents a novel interconnect for prolonged operation at high temperature. The third paper presents the failure mechanism of whiskers which may be a dominant failure mechanism in long-life systems.

If You Can't Take the Heat (There Are Other Options...)
Robert M. S. Simon, USTEK Inc.

New Interconnection for High Temperature Application: HotPowCon (HPC)
Jörg Trodler, Heraeus Materials Technology GmbH & Co. KG; A. Fix., T. Herberholz, Ph.D., Robert Bosch, M. Nowottnick, Ph.D., University of Rostock

Aging Effects on Creep Behavior of Lead-Free Solder Joints and Reliability of Fine-Pitch Packages
Jiawie Zhang, Ph.D., Zhou Hai, Sivasubramanian Thirugnanasambandam, John Evans, Ph.D., Michael J. Bozack, Yifei Zhang, Jeffrey C. Suhling, Richard Sesek, Center for Advanced Vehicle and Extreme Environment Electronics - Auburn University

Mechanical and Electrical Properties of Sn, Zn and Cd Whiskers
Aleksandra Fortier, Ph.D., Vikranth Gullapplli, University of North Texas

TUESDAY, October 16
10:30am - 12:30pm

AAT1

Bend and Shock Reliability of BGAs and CSPs

Chair: Pradeep Lall, Ph.D., M.B.A., Auburn University
Co-Chair: Mike Nadreau, Henkel Electronic Materials LLC
Tuesday, October 16 | 10:30am – 12:30pm | Australia 3

This session will focus on the performance of BGA and CSP when mounted to boards and subjected to various mechanical stresses including shock and bend. The first paper outlines the performance of a 0.4 mm pitch WL-CSP subjected to cyclic bending that simulates repeated key strokes on a handheld device. Next, the JEDEC drop test performance of various configurations of WL-CSP will be discussed. In order to determine acceptable levels of assembly process strain, the third paper in the session looks at how various new laminate types and BGA package combinations perform in bend testing. The final presentation looks at predicting the accumulated damage to solder and also copper interconnects from various amplitude cycling.

Board Level Reliability Cyclic Bend Test Study on WCSP Packages
Andy Zhang, Ph.D., Siva Gurrum, Vikas Gupta, Texas Instruments

Drop Reliability Test on Different Dimensional Lead-Free Wafer Level CSP
Sivasubramanian Thirugnanasambandam, Jiawei Zhang, John Evans, Ph.D., Fei Xie, Ph.D., Auburn University

Mechanical Reliability: Updated Results from a Spherical Bend Test Program
*John McMahon, Brian Standing, Celestica Inc.

On the Fatigue Life of Microelectronic Interconnects in Cycling With Varying Amplitudes
P. Borgesen, Ph.D., Y. Jaradat, J. E. Owens, A. Qasaimeh, B. Arfaei, Binghamton University; L. Yin, M. Anselm, Ph.D., Universal Instruments Corporation

MFX1

Alternate Solder Alloys for Various Applications

Chair: Raiyo Aspandiar, Ph.D., Intel Corporation
Co-Chair: Kantesh Doss, Ph.D., Jabil Circuit, Inc.
Tuesday, October 16 | 10:30am – 12:30pm | Asia 4

There is a continuing drive within the electronics manufacturing industry to develop new solder alloys for a variety of applications and reasons. New alloys and solder pastes are needed to enhance solder joint reliability, mitigate solder joint defects caused by wettability issues or package and board warpage, to survive high use temperatures in the field, to reduce solder material cost, and for lowering the soldering temperature.

Lead-Free Alloy Development
Karl Seelig, AIM

SnZn Solder Alternative for Low Cost Pb-free Surface Mount Assemblies
Gavin Jackson, Ph.D., Ian J. Wilding, Richard Boyle, Puwei Liu, Matthew Holloway, Henkel Ltd.; Maurice N. Collins, Eric Dalton, Jeff Punch, Stokes Institute

Ag-Au-Ge Alloys for High Temperature Geothermal and Oil Well Electronics Applications
*Paul Vianco, Ph.D., A. C. Kilgo, J. A. Rejent, R. Grant, Sandia National Laboratories

Case Study: Development of a Low Temperature Tin-Bismuth-Silver Solder Paste
Emmanuelle Guene, Aurélie Ducoulombier, Céline Puechagut, Antoine Boisselot, Inventec Performance Chemicals

SMT1

Bottom Termination Components - Part 1

Chair: Chrys Shea, Shea Engineering Services
Co-Chair:Dan Baldwin, Ph.D., Engent, Inc.
Tuesday, October 16 | 10:30am – 12:00pm | Asia 2

Bottom Termination Components, or BTCs, are a class of electronic packaging that includes QFNs, DFNs, LGAs, SONs, and MLFs. Because of their low cost and low profile, their popularity continues to increase, but they present specific processing challenges to circuit board assemblers. Issues surrounding BTCs include SMT land pattern design, stencil design, solder voiding on thermal/ground pads, rework, and reliability in high-performance applications. In this first of two BTC sessions, presenters will address key issues in assembly, rework, and reliability, with a focus on high-performance applications in aerospace, defense and network systems.

Bottom Termination Component Land Pattern Design and Assembly for High Reliability Electronic Systems
Scott Nelson, Harris Corporation

Board Level Reliability and Assembly Process of Advanced QFN Packages
Li Li, Ph.D., Cisco Systems Inc.; Brian Smith, HDP User Group International, Inc.; Joe Smetana, Richard Coyle, Alex Chan, Alcatel-Lucent; David Geiger, Flextronics; Chris Katzko, TTM Technologies; Jeffrey ChangBing Lee, IST-Integrated Service Technology, Inc.

Simple, Fast High Reliability Rework of Leadless Devices
Bob Wettermann, BEST, Inc.

EMS

Strategies for a Changing Market

Chair: Sue Mucha, Powell-Mucha Consulting, Inc.
Co-Chair: Mike Buetow, CIRCUITS ASSEMBLY Magazine
Tuesday, October 16 | 10:30am – 1:00pm | Asia 3

As global economies continue to evolve, so do EMS and OEM relationships. Onshore or offshore? Can regional providers really offer a comprehensive full service solution? What aftermarket services make sense in the EMS model? This session looks at these topics and more. Session format includes: four presentations and a panel discussion on the evolving EMS business model.

The Evolving Nature of Offshore/Onshore Options
Curtis Campbell, SigmaTron International

Force Multiplication-Supporting Complex Customer Requirements at a Regional Level
Rick Herndon, Firstronic, LLC

Aftermarket Services: An EMS and OEM Perspective
Bryce "Skip" Boothby Jr., Celestica Inc.

Re-shoring: Total Cost of Ownership, a Contract Manufacturing Guide
Alexander Zeitler, BTW, Inc.

Panel Session: The Evolving EMS Business Model
Moderated by Susan Mucha, Powell-Mucha Consulting Inc.

TUESDAY, October 16
2:00pm - 3:30pm

AAT2

BGA/LGA Thermal Cycling Reliability

Chair: Marie Cole, IBM Corporation
Co-Chair: Richard Coyle, Ph.D., Alcatel-Lucent
Tuesday, October 16 | 2:00pm – 3:30pm | Australia 3

Process and design variables for BGA and LGA interconnect structures impact solder joint thermal cycle life. Solder joint voids may be present due to process conditions or via in pad connections. At what level do these voids impact solder joint reliability? Solder joint height and the resulting microstructure can also affect thermal cycle life. Learn more about these factors in this reliability session.

Assessing The Impact on Temperature Cycling Reliability of High Levels of Voiding in BGA Solder Joints
Grace Qin, Ph.D., Francis Toth Jr., Raiyo Aspandiar, Ph.D., Intel Corporation

BGA Thermal Cycle Solder Joint Integrity Using a Nonconcentric Via in Pad Structure
*David Hillman, Dave Adams, Tim Pearson, Ross Wilcoxon, Rockwell Collins

LGAs vs. BGAs – Lower Profile and Better Reliability?
Shantanu Joshi, P. Borgesen, Ph.D., B. Arfaei, M. Obaidat, A. Alazzam, Binghamton University; L. Yin; M. Meilunas, M. Anselm, Ph.D., Universal Instruments Inc.

MFX2

Ruggedized Electronics - Coatings and Underfills

Chair: John McMahon, P.E., Celestica Inc.
Co-Chair: Leo Devine, Indium Corporation
Tuesday, October 16 | 2:00pm – 3:30pm | Asia 4

Protecting electronic assemblies from environmental stresses has always been a priority for the Industrial, Aerospace and Defense sectors. The transition to Pb-free solders, the proliferation of mobile devices and the planned reductions in server room environmental controls bring the topic into focus for a much larger audience. Electronic assemblies have become ubiquitous; they exist in every environment from your kitchen to the surface of Mars. Post assembly reinforcement is now a standard hardening methodology for mobile devices and machine mounted electronics. Conformal coatings are being implemented across a wide range of products to deal with moisture, corrosive gases, and ambient pollutants to enhance product lifetimes. They are also being investigated for Tin whisker mitigation. This session provides insight into common implementation problems and introduces new materials and processes.

Types of Conformal Coatings, Applications and Process Issue Mitigation
David Allen, Libra Industries

New Underfill Materials Designed for Increasing Reliability of Fine-Pitch Wafer Level Devices
*Brian J. Toleno, Ph.D., Rong Zhang, Ph.D., Hoseung Yoo, Stanley Hu, Henkel Electronic Materials, LLC

Plasma Polymerization: A Versatile and Attractive Process for Conformal Coating
*Tim von Werne, Ph.D., Andy Brooks, Siobhan Woollard, Gareth Hennighan, Semblant Inc.

SMT2

Bottom Termination Components – Part 2

Chair: Chrys Shea, Shea Engineering Services
Co-Chair:Dan Baldwin, Ph.D., Engent, Inc.
Tuesday, October 16 | 2:00pm – 3:30pm | Asia 2

The most considerable issue with QFNs in all applications is solder voiding on the thermal pad. Excessive voiding can cause insufficient heat sinking and premature die failure. Numerous stencil design, solder paste, and reflow studies have been performed with the objective of minimizing voiding. In this second BTC session, innovative new approaches are explored. Tests using solder preforms and solder mask venting channels on the thermal pad are presented, along with studies correlating results of different inspection methods and the importance of proper process control in the QFN paste printing process.

The Effects of Preforms in Paste on Voiding Under Large Area Surface Mount (BTC) Components
Ellen Tormey, Ph.D., Jerry Sidone, Westin Bent, Karen Tellefsen, Paul Koep, Rahul Raut, Cookson Performance Materials, Alpha Division

Effect of Thermal Pad Patterning on QFN Voiding
*Ning-Cheng Lee, Ph.D., Derrick Herron, Yan Liu, Ph.D., Indium Corporation

Using SPI, AXI and CT X-ray Data to Improve SMT Process With QFN Devices
Stephen Chen, Tho Vu, Hung Le, Alan Chau, Elliott Le, Phuong Chau, Hao Cui, Raymond Tran, Roy Chung, Bryan Goble, Nadarajan M. Singaram, Zhen (Jane) Feng, Ph. D., David A. Geiger, Murad Kurwa; Flextronics International; *Evstatin Krastev, Ph. D., Nordson DAGE

BUS

Supply Chain Management Via Predictive Cost and Assembly Process Modeling

Chair: Dale Lee, Plexus Corporation
Co-Chair: Gary Beckstedt, World Micro, Inc.
Tuesday, October 16 | 2:00pm – 3:30pm | Asia 3

Globalization, shorter time to market, and shorter product life cycles have place greater emphasis on modeling of costs and manufacturability to ensure product availability and profitability. This session will address the use of predictive modeling for design cost drivers, should cost/real cost comparisons, and assembly impacts in the development and/or early production process.

Improving Supply Chain Velocity Through Six-Sigma Application and Tools
*Harsh Kohli, Zensar Technologies Limited

Leveraging Manufacturing Solutions in FMEA
Jay Gorajia, Mentor Graphics

A Focus on Productivity: Several Case Studies
*Ronald Lasky, Ph.D., P.E., Indium Corporation and Dartmouth College

TUESDAY, October 16
4:00pm - 5:30pm

AAT3

Impact of Microstructure on Solder Joint Life

Chair: Randy Schueller, Ph.D., DfR Solutions
Co-Chair: Derek Daily, Senju Comtek Corporation
Tuesday, October 16 | 4:00pm – 5:30pm | Australia 3

The microstructure within a solder joint will strongly influence the ability of the solder to absorb stress without fracturing. This session will explore a few critical aspects of the microstructure. One paper will discuss the influence of aging on the solder joint life, another will show the impact of intermetallic thickness, while the last will reveal the impact of gold embrittlement on Pb-Free solder joints. A solid understanding of the influence of microstructure will enable the manufacturing of reliable assemblies.

Method for Determination of Accrued Damage and Remaining Life During Field-Usage in Lead-Free Electronics
*Pradeep Lall, Ph.D., Mahendra Harsha, Auburn University; Kai Goebel, NASA

Should Intermetallic Thickness Measurements be Needed to Determine Solder Joint Reliability?
Scott Buttars, Chonglun Fan, Ph.D., Raiyo Aspandiar, Ph.D., Intel Corporation

The Stability Of Cu6Sn5 In The Formation And Performance Of Lead-Free Solder Joints
Keith Sweatman and Tetsuro Nishimura, Nihon Superior Co., Ltd.; Kazuhiro Nogita, University of Queensland

MFX3

Connector Reliability: Defect Detection and the End of RoHS Lead Exemptions

Chair: Jim Zanolli, Teka Interconnection Systems
Co-Chair:Aravind Munukutla, Intel Corporation
Tuesday, October 16 | 4:00pm – 5:00pm | Asia 4

Increasing customer requirements for reliability and the end of RoHS lead exemptions will present continuing challenges. This session explores critical defect detection and reliability issues for press-fit and BGA contacts with lead-free solder and surface finishes.

Compliant Pin Interconnect Challenging and Reliability after January 1, 2012 RoHS Exemption
*Paul Wang, Ph.D., David He, Xiang Yu, DF Chung, Mitac International Inc.; Livia Hu, Bobby Dayal, Karl Sauter, Jorge Martinez-Vargas, Oracle

Lead-Free SMT Connector Process Exposure, Reliability, Quality, and Yield Assessment for High Thermal Mass Assemblies
Jimmy Chow, John McMahon, *Heather McCormick, Russell Brush, Vejeyathaas Thambipillai, Kok Wei Khoo, Celestica Inc.; *Matthew Kelly,*Marie Cole, IBM Corporation

SMT3

SMT Printing Technology

Chair: Steve Greathouse, Plexus Corporation
Co-Chair: Brian Smith, DEK
Tuesday, October 16 | 4:00pm – 5:30pm | Asia 2

With today’s complex PCBs, process engineers are confronted with the competing demands of small fine pitch parts and larger components on the same design. Delivering the proper amount of material to each PCB land is key to a robust process. Furthermore, chemicals in stencil cleaning raise process control issues and also environmental and safety issues. Here we’ll cover the advances in stencils and cleaning chemistries that address concerns in SMT printing.

Influence of Printer Settings on Step Stencil Design
Carmina Läntzsch and George Kleemann, LaserJob GmbH

Which New Stencil Technologies Provide the Best Paste Printing Performance?
Richard Brooks, Total Innovative Solutions; John Carr, Marty Carr, Great Lakes Engineering

Understencil Wiping: Does It Benefit Your Process?
David Lober, *Mike Bixenman, DBA, Kyzen Corporation, *Chrys Shea, Shea Engineering Services

ENV

RoHS and Conflict Minerals Regulations and Impact

Chair: Julie Silk, Agilent Technologies, Inc.
Co-Chair: Rob Rowland, RadiSys Corporation
Tuesday, October 16 | 4:00pm – 5:30pm | Asia 3

Interpretation of governmental regulations requirements is sometimes not clear, and implementation can have surprising results. The European Union RoHS recast specifies a technical compliance file for RoHS compliance under the CE mark. The Frank-Dodd Act of 2010 financial reform bill includes reporting for conflict minerals. Learn about reporting requirements and how conversion to RoHS can lead to cost reductions.

Can RoHS Conversion Actually Reduce Product Cost?
*Chrys Shea, DA-TECH Corporation/Shea Engineering Services; David Steele, John Kanavel, DA-TECH Corporation

Technical Compliance File - What it Means for EU RoHS CE Mark
Krista Crotty, Alberi EcoTech

Conflict Minerals Update - What are the Requirements?
Krista Crotty, Alberi EcoTech

WEDNESDAY, October 17
8:00am - 10:00am

AAT4

Process Solutions for Advanced PoP and Fine Pitch CSPs

Chair: Brian Roggeman, Qualcomm
Co-Chair: Martin Anselm, Ph.D., Universal Instruments Corporation
Wednesday, October 17 | 8:00am – 10:00am | Australia 3

The continuing trend of miniaturization puts increased emphasis on process solutions for a robust assembly. The wide application of PoP and the adoption of less than 0.4mm pitch CSPs in smartphones and tablets are challenging current design rules and material sets. This session will cover factors such as PCB design, paste printing parameters, dip & place processes and alloy selection for the successful integration of advanced components.

Influence of Alloy Combination and PCB Location on Package on Package (PoP) Component Assembly
*S. Manian Ramkumar, Ph.D., Rochester Institute of Technology

Fine Pitch (0.4mm) TMV Package on Package Assembly in Air
Rafael Padilla, Derek Daily, Satoru Akita, Takayuki Yoshida, Tokuro Yamaki, Senju Comtek Corporation

Assembly and Design Challenges for New Generation Package on Package (POP) and 0.3mm Pitch Chip Scale Package (CSP)
*Jonas Sjoberg, Ranilo Aranda, David Geiger, Murad Kurwa, Flextronics Advanced Engineering Group

PCB Assembly Process Development and Characterization of 0.3mm µCSP Packages
*Chrys Shea, Shea Engineering Services; Global Operations Services – Advanced Manufacturing Technology (GOS-AMT), Jabil Circuit, Inc

MFX4

Head-in-Pillow and Non-Wet Open Defect Reduction

Chair: Don Burr, Global Traffic Technologies, LLC
Co-Chair: Gene Dunn, Plexus Corporation
Wednesday, October 17 l 8:00am — 9:30am | Asia 4

Head-in-Pillow component soldering defects have been increasingly affecting the electronics assembly industry over the last few years. Various optimization processes have been employed to help reduce this issue. The session will discuss the causes of the defect and optimization of materials and processes to reduce it from a material supplier perspective as well as from an OEM who have carried out investigations to address the issue including solder paste chemistry, stencil parameters, reflow profile and component warpage studies during reflow. A new type of defect called non-wet open for BGA spheres during assembly will also be discussed in this session with a review of process parameters to help reduce the issue.

Material and Process Optimization for Head-in-Pillow Defect Elimination
Timothy Jensen, *Ronald Lasky, Ph.D., P.E., Sehar Samiappan Indium Corporation

Overcoming Head-in-Pillow Defects in Hybrid LGA Socket Assembly
*Marie Cole, Theron Lewis, Jim Bielick, PK Pu, Stephen Hugo, Phil Isaacs, Eddie Kobeda, Ph.D., *Matthew Kelly, IBM Corporation; Su Bing, Alex Chen, James Huang, Kevin Liu, Brian Standing, Celestica Inc.

The Challenges of Non-Wet-Open BGA Solder Defect
Dudi Amir, Srinivasa Aravamudhan, Satyajit Walwadkar, Lilia May, Intel Corporation

SMT4

Cleaning: Mechanics, Materials and Where They Bring Value Today

Chair: Tom Forsythe, Kyzen Corporation
Co-Chair: Jim Timler, Stoelting, LLC
Wednesday, October 17 | 8:00am – 9:30am | Asia 2

The session will cover advances in machine and materials design along with the perspective of a global leading EMS manufacturer regarding selection and process evaluation. Cleaning has been off many people’s radar for nearly a generation. This session will provide insightful data for both technical staff and business leadership to better understand the challenges and value that cleaning presents.

No Clean Flux Residue Reliability
Jennifer Nguyen, David Geiger, Flextronics International

High Speed Cleaning in a Reduced Manufacturing Footprint
Steve Stach, Austin American Technology; *Mike Bixenman, DBA, Kyzen Corporation, *Dale Lee, Plexus Corp.

A Comparative Cleaning Study to Showcase the Effective Removal of OA Flux Residues
Umut Tosun, Michael McCutchen, Jigar Patel, ZESTRON

SUB1

Solderability and Reliability on Printed Circuit Board Surface Finishes

Chair: Don Banks, St. Jude Medical
Co-Chair: Viswam Puligandia, Ph.D. Nokia (Retired)
Wednesday, October 17 | 8:00am – 9:30am | Asia 1

Three surface finish options for printed circuit assembly are covered in this session. First, electroless nickel/immersion gold (ENIG) properties and their contribution to quality and reliability are discussed. Immersion tin is then reviewed, focusing on better understanding the copper interface metallurgy at lead-free temperatures. The final paper studies electroless nickel/immersion silver as a cost reduction that may deliver similar performance to ENIG. Testing includes solderability, tarnish/corrosion resistance, and aluminum wire bonding.

Immersion Gold: Why More Is Not Better
Hank Lajoie, James Trainor, OMG Electronic Chemicals

The Re-emergence of Immersion Tin Final Finish
Bernhard Wessling, Ph.D., Karl Wengenroth, Mario Orduz, Holger Merkle, Enthone Inc.

Electroless Nickel/Immersion Silver - A New Surface Finish for PCB Applications
*Lenora Toscano, Ernest Long, Ph.D., MacDermid Inc.

WEDNESDAY, October 17
10:30am - 12:00pm

AAT5

Advances in Copper Wire Bonding Technology

Chair: Daniel F. Baldwin, Ph.D., Engent Inc.
Co-Chair: Dock Brown, Consultant
Wednesday, October 17 | 10:30am – 12:00pm | Australia 3

Although copper wire bonding technology has existed for some time, it has is only recently expanded into high volume package production. Cu wire bonding offers cost advantages over traditional gold wire as well as a lower resistance interconnect. This session will begin with an overview of Cu wire bond technology followed by an in depth study on the reliability of Cu wire bonds. The session will wrap up with a study on a lead free Cu wire bondable surface finish for PCBs comprised of electroless NiPdAu.

Overview of Copper Wire Bonding Technology
*Andrew Mawer, Stephen Lee, Tu Anh Tran and Les Postlethwait, Freescale Semiconductor

Reliability of Cu Wire Bonds
*Randy Schueller, Ph.D., DfR Solutions

Electroless NiPdAu Plating for Cu Wire Bonding
Yoshinori Ejiri, Takehisa Sakurai, Yoshiaki Tsubomatsu,*Kiyoshi Hasegawa, Hitachi Chemical Co., Ltd.

MFX5

Advanced Inspection Techniques for Printed Circuit Board Assembly

Chair: R. Scott Priore, Cisco Systems, Inc.
Co-Chair: Rod Howell, Libra Industries
Wednesday, October 17 | 10:30am – 12:00pm | Asia 4

As PCBA density increases, coupled with the ever shrinking component technology, inspection techniques must also evolve to support these needs. This session will look into several key process check points, Solder Paste Inspection, Acoustic Micro Imaging (AMI) for surface flatness, and Computer Tomography (CT) used in 3D analysis for an electronic cross section. These tools are critical for anyone involved with the assembly of PCBA’s or failure analysis of them.

Using SPI to Improve Print Yields
*Chrys Shea, Shea Engineering Services; Marion Zubrick, Christopher Associates

Surface Flatness and Bond Thickness Measurement Methods Using the Acoustic Microscope
Janet E. Semmens, Sonoscan, Inc.

3D Board Level X-ray Inspection Via Limited Angle Computer Tomography
*Evstatin Krastev, Ph.D., *David Bernard Ph.D., Dragos Golubovic, Ph.D., Nordson DAGE

SMT5

Future of Cleaning and Cleanliness Testing

Chair: Linda Woody, Lockheed Martin
Co-Chair:Jack Reinke, Kyzen Corporation
Wednesday, October 17 | 10:30am – 12:00pm | Asia 2

Cleaning has become complicated by the advent of Pb free processes and fluxes. Current commercial industry has been embracing no-clean fluxes for years and with the transition of high reliability hardware requirements into the Pb free world other flux chemistry may be required along with cleaning and testing capabilities. This session will discuss these trends along with the development of new test vehicle designs for accurately accessing your cleaning processes.

The IPC-B-52 SIR Test Vehicle – A Discussion of the Current Test Vehicle Design and Possible Modifications for the Future
Mitchell Ferrill, Matt Kelly, Wai Ma, Nandu Ranadive, Cheikhou Ndiaye, Jim Bielick, IBM Corporation; Simin Bagheri, Celestica Inc.

Cleaning a No-Clean Flux and Related Reliability Issues
Eric Camden, Foresite

Water Soluble Lead-Free Process Chemistry for High Voltage and High Reliability Hardware Requirements
*Matthew Kelly, Mitchell Ferrill, Wai Ma, Nandu Ranadive, Cheikhou Ndiaye, IBM Corporation; Simin Bagheri, Prakash Kapadia, Celestica Inc.

SUB2

Creep Occurrence and Corrosion Products

Chair: Lenora Toscano, MacDermid Inc.
Co-Chair: Scott Nelson, Harris Corporation
Wednesday, October 17 | 10:30am – 12:00pm | Asia 1

Creep corrosion has been investigated in the electronics industry for a number of years but the full extent of defect rate and mechanism are still in question. This session will give an overview of geographic regions where failures are found. Papers will also discuss the mechanism and constituents of the corrosion product for multiple finishes, through the use of highly technical analytical analysis methods.

Data Mining for Creep Corrosion on Desktop Computers
David C. Cook, Intel Corporation

Study of Sulfide Films Grown on Printed Circuit Boards
Anil Kurella, Ph.D., Balu Pathangey, Intel Corporation

Corrosion Mechanisms of Lead-Free PCB Surface Finishes in Corrosive Environments
*Chen Xu, , Ph.D., W.D. Reents, Jr., J.P. Franey, D.A. Fleming, G.E. Derkits Jr., P. Ahern, Alcatel-Lucent; B. Wright, K. Demirkan, R. L. Opila, University of Delaware; K. Hannigan, M. Reid, J. Punch, CTVR, Stokes Institute, University of Limerick

WEDNESDAY, October 17
2:00pm - 3:30pm

AAT6

Trends in Advanced Packaging

Chair: Charles Woychik, Ph.D., Invensas Corporation
Co-Chair: Charles Bauer, Ph.D., TechLead Corporation
Wednesday, October 17 | 2:00pm – 3:30pm | Australia 3

An overview of the design and fabrication methods to produce Through Silicon Via (TSV) interposers will be presented. This will include TSV fabrication issues and solutions, microbump assembly of 45um pitch die to the Si-interposer and the supporting assembly yield and reliability data. In addition, the development challenges and success of converting processes using conventional capillary underfill to Molded Underfill (MUF) will be given. Finally, fine pitch (0.25mm) WLCSP assembly process development using paste printing and flux dipping with supporting reliability data will be presented.

Development and Optimization of Through Silicon Via Interposers
Pejman Monajemi, Ph.D., Michael Newman, Cyprian Uzoh, Charles Woychik, Ph.D., Lina Ayat, Terrence Caskey, Invensas Corporation

Process Development for Fine Pitch CSP Components
Fei Xie, Engent, Inc.

Investigation into 0.3mm Pitch WLCSP Assembly and Reliability
Michael Meilunas, *Denis Barbini, Ph.D., Universal Instruments Corporation

MFX6

Proven Technologies for Next Generation Lead-Free Rework

Chair: Mario Scalzo, Indium Corporation
Co-Chair: Robert Kinyanjui, Ph.D., John Deere
Wednesday, October 17 | 2:00pm – 3:00pm | Asia 4

When tolerances and limitations of current production materials are reached, the first signs of said limitations are yield losses and increases in rework. In this session, we will discuss next generation techniques and materials for rework; including removal and replacement of Plated Through-Hole (PTH) assemblies, Micro-Ball Grid Array (µBGA) removal and replacement, and low-silver content alloy cored wires.

Considerations for Reduced Cost Micro Array Component Rework
Ed Zamborsky, OK International

Automated Site Redress Method Application for Pb-Free Rework
Wayne Zhang, IBM China Procurement Company; PK Pu, Sven Peng, Phil Isaacs, IBM Corporation; William Uy, Henley Zhou, Flextronics ZhuHai China

SMT6

BGA Backwards Compatibility? The Mixed Metal Dilemma

Chair: Jeffrey Kennedy, Celestica Inc.
Co-Chair: Keith Sweatman, Nihon Superior
Wednesday, October 17 | 2:00pm – 3:30pm | Asia 2

This session will explore the SAC BGA compatibility with SnPb solder and the effects on the reliability and methods to get the best possible performance when facing this soldering challenge. Various SnPb peak temperature profiles were studied with regards to mixing and their ATC reliability performance compared to pure SnPb and SAC solder joints. Additional discussion on shear testing and process optimization as well as failure mechanisms associated with mixed metals joints. The voiding behavior of mixed metals solder joints is also explored and the mechanisms will be discussed.

Voiding Behavior in Mixed Solder Alloy System
*Ning-Cheng Lee, Ph.D., Yan Liu, Ph.D., Derrick Herron, Indium Corporation

Development of Processing Parameters for Soldering Lead-Free Ball Grid Arrays using Tin-Lead Solder
William Fox, Ben Gumpert, Linda Woody, Lockheed Martin Missiles and Fire Control

Thermal Fatigue Reliability and Microstructural Characterization of a Large, High Density Ball Grid Array with Backward Compatible Assembly
*Richard Coyle, Ph.D., Richard Popowich, Peter Read, Alcatel-Lucent; Vasu Vasudevan, Raiyo Aspandiar, Ph.D., Steve Tisdale, Intel Corporation; Iulia Muntele, Sanmina-SCI Corporation

SUB3

Miscellaneous Topics Relating to FA and Process of PCBs

Chair: Raiyo Aspandiar, Ph.D., Intel Corporation
Co-Chair: Scott Buttars, Intel Corporation (Retired)
Wednesday, October 17 | 2:00pm – 3:30pm | Asia 1

Printed Circuit Boards (PCB) are the back-bone for successful interconnections. They provide mechanical support as well as electrical connectivity. First, we will explore a novel technique to fill blind micro-vias with electroplated copper. The second paper deals with the integrity of the PCBs by examining the pad-cratering phenomenon that arose due to increased reflow temperatures experienced during transition to Pb-free. The final paper discusses Conductive Anodic Filament (CAF) formation that results in failures without signs of catastrophic burning that is commonly recorded in several earlier publications.

Filling Characteristics of Process for Electroplating Copper into Microscopic Recessed Features
Maria Nikolova, Ph.D., Jim Watkowski, MacDermid, Inc.

Pad Cratering Susceptibility
Boon San Wong, Julie Silk, Agilent Technologies

Investigation of CAF Failures in Printed Circuit Board Assemblies
Aravind Munukutla, Brent Pingrey, Gerald Gmerek, Intel Corporation

WEDNESDAY, October 17
4:00pm - 5:30pm

AAT7

3D Packaging and Integration

Chair: Andrew Mawer, Freescale Semiconductor
Co-Chair: Viswam Puligandia, Ph.D. Nokia (Retired)
Wednesday, October 17 | 4:00pm – 5:30pm | Australia 3

This session will focus on various aspects of cutting edge three dimensional (3D) integration of electronic devices. The first paper will outline the current status of 3D integration approaches and will present some potential solutions for different market segments. The second presentation describes the assembly and reliability of Cu-pillar bumped die with Pb-free solder that is attached to a through silicon interposer (TSI) using thermode compression bonding and then attached to an organic substrate using eutectic bumps and capillary underfill. Lastly, the development of a second level assembly process and reliability performance of 3D WL CSP packages will be discussed.

3D Technology - A Promising Approach in the Field of Smart System Integration
M. Juergen Wolf, Fraunhofer Institute for Reliability and Microintegration (IZM)

3D Packaging for High Computing with Wide IO Processor-Memory Interface
Ilyas Mohammed, Ron Zhang and Rajesh Katkar, Invensas Corporation

Effect of Solder Paste and Flux Type on Board Level Reliability of a 3D Wafer Level Chip Scale Package
Fei Xie, Ph.D., *Daniel F. Baldwin, Ph.D.; *Paul Houston; Brian Lewis, Engent, Inc.

MFX7

Optimizing Thermal Performance in Printed Circuit Board Assemblies

Chair: David Steele, DA-TECH Corporation
Co-Chair: Hugh Roberts, Atotech
Wednesday, October 17 | 4:00pm – 5:00pm | Asia 4

Printed circuit board assemblies are constantly being driven to incorporate increased functionality in a smaller foot print. Because of this the need for effective thermal management has become critical. Inadequate heat dissipation can decrease the reliability of the end product, may cause premature component/product failure, and may create safety problems. This session provides information on two approaches to managing thermal performance.

Heatsink Adhesive Bonding Investigation
Smile Ling, Jim Bielick, Michk Huang, Wayne Zhang, IBM Corporation; Blue Wang, Xiaoyun Xia, Divas Liu, Foxconn; Alec Chen, Hill Liu, Paradise Liu, Wistron

Evaluation of Phase Change Thermal Interface Materials by In-situ Methods and Their Application Dependant Performance Parameters
Scott Allen, Henkel Electronic Materials LLC

SMT7

Void Reduction and Joint Reliability

Chair: Denis Barbini, Ph.D., Universal Instruments Corporation
Co-Chair: Laura Turbini, Ph.D., International Reliability Consultant
Wednesday, October 17 | 4:00pm – 5:30pm | Asia 2

This session focuses on the challenges assemblers have with the formation of reliable, robust, void free solder joints. Utilizing various soldering techniques and package construction, these papers will provide unique, novel solutions that can be implemented immediately. This will be especially important as the assembly risks increase as the complexities of the novel package and PCBA’s increase.

Interconnection Reliability of Interposer and Reballing Options
*Richard Coyle, Ph.D., Richard Popowich, Peter Read, Debra Fleming, Alcatel-Lucent; Michael Meilunas, Martin Anselm, Ph.D., Universal Instruments Corporation; Mike Laskey, ISI

Optimizing Solder Paste for Void Minimization with Vacuum Reflow
*Keith Sweatman, Takashi Nozu, Tetsuro Nishimura, Nihon Superior Company Ltd.

A New Approach to Void-Free Reflow Soldering
*Christian Ott, Rolf Diehm, SEHO Systems GmbH; Mathias Nowottnick, University of Rostock; Uwe Pape, Fraunhofer IZM

SUB 4

Surface Finish for Assembly and Reliability

Chair: Kantesh Doss, Ph.D., Jabil Circuit, Inc.
Co-Chair: Pravin Sequeira, Tektronix Component Solutions
Wednesday, October 17 | 4:00pm – 5:30pm | Asia 1

Three diverse topics in the area of plated surface finishes will be presented during this session. The first paper will explore Ni-Pd-Ag as a viable plating finish for soldering and bonding in LED packaging applications. The second paper will provide the results of investigations on the long term reliability of eutectic Sn-Pb and Pb-free solder joints to the ENEPIG surface finish. The last paper of the session will look at package substrate advancements through Improved Adhesion of Electroless Copper to Dielectrics.

Study of the Deposit Characteristics of Electroless (Autocatalytic) Silver as a Final Finish for LED Package
Shigeo Hashimoto, Katsuhisa Tanabe, Masayuki Kiso, Daisake Hashimoto, Donald Gudeczauskas, George Milad, Uyemura International Corporation

Long Term Reliability of Eutectic Sn-Pb and Pb-free Solder Joints Made to the ENEPIG Surface Finish
William Johannes, *Paul Vianco, Ph.D., Jerome Rejent, Sandia National Laboratories

Package Substrate Advancements Through Improved Adhesion of Electroless Copper to Dielectrics
Lutz Brandt, Ph.D., Zhiming Liu, Ph.D., Tafadzwa Magaya, Robin Taylor, Atotech UK Ltd.

THURSDAY, October 18
8:00am - 10:00am

LF1

iNEMI Pb-Free Alloy Characterization Project Report: Thermal Fatigue Performance

Chair: David Hillman, Rockwell Collins
Co-Chair: Linda Woody, Lockheed Martin
Thursday, October 18 | 8:00am – 10:00am | Australia 3

An increasing number of Pb-free solder alloys are coming to market. The iNEMI Pb-Free Alloy Characterization team is executing experiments to clarify the effects of alloy composition on thermal fatigue performance. Twelve Pb-free solder alloys plus Sn-37Pb are being subjected to 10 different thermal cycle profiles so that acceleration models can be developed. Papers in this session present the program goals, experimental methods, and results obtained to date.

iNEMI Pb-Free Alloy Characterization Project Report: Part I – Program Goals, Experimental Structure, Alloy Characterization, and Test Protocols for Accelerated Thermal Cycling
*Gregory Henshall, Ph.D., Jian Miremadi, Elizabeth Benedetto, Aileen Allen, Hewlett- Packard Co.; Richard Parker, Delphi; Richard Coyle, Joe Smetana, Alcatel-Lucent; Jennifer Nguyen, Flextronics; Weiping Liu, Indium Corporation; Keith Sweatman, Keith Howell, Nihon Superior Co., Ltd.; Ranjit S. Pandher, Cookson Electronics; Derek Daily, Senju Comtek Corporation; Mark Currie; Donald Moore, Henkel Electronic Materials LLC; Tae-Kyu Lee, Cisco Systems; Julie Silk, Bill Jones, Agilent Technologies; Stephen Tisdale, Fay Hua, Intel Corporation; Michael Osterman, CALCE; Bill Barthel, Plexus Corp.; Thilo Sack, Polina Snugovsky, Celestica, Inc.; Ahmer Syed, Amkor Technology; Joelle Arnold, DfR Solutions; Graver Chang, IST Inc.

iNEMI Pb-Free Alloy Characterization Project Report: Part II - Thermal Fatigue Results for Two Common Temperature Cycles
Richard Parker, Delphi; *Richard Coyle, Ph.D., Joe Smetana, Alcatel-Lucent; *Gregory Henshall, Ph.D., Elizabeth Benedetto, Hewlett-Packard Co.

iNEMI Pb-Free Alloy Characterization Project Report: Part III - Thermal Fatigue Results for Low Ag Alloys
*Keith Sweatman, Keith Howell, Nihon Superior Co. Ltd.; Richard Coyle, Alcatel-Lucent; Richard Parker, Delphi; *Gregory Henshall, Ph.D., Elizabeth Benedetto, Jian Miremadi, Aileen Allen, Hewlett-Packard Co.; Weiping Liu, Indium Corporation; Ranjit S. Pandher, Cookson Electronics; Derek Daily, Senju Comtek Corporation; Mark Currie, Donald Moore, Henkel Electronic Materials LLC; Jennifer Nguyen, Flextronics; Tae-Kyu Lee, Cisco Systems; Michael Osterman, CALCE; Joelle Arnold, DfR Solutions; Graver Chang, IST Inc.

iNEMI Pb-Free Alloy Characterization Project Report: Part IV - Effect of Isothermal Preconditioning on Thermal Fatigue Life
*Richard Coyle, Ph.D., Joe Smetana, Alcatel-Lucent, Richard Parker, Delphi; *Gregory Henshall, Ph.D., Elizabeth Benedetto, Hewlett-Packard Co.; Michael Osterman, CALCE; Donald Moore, Henkel Electronic Materials LLC; Graver Chang, IST Inc.; Joelle Arnold, DfR Solutions; Tae-Kyu Lee, Cisco Systems

LF2

Dependable Electronics with Lead-Free Components/Systems

(Managing the Transition to a "Green World")
NEW THIS YEAR! A WORKSHOP BUILT INTO THE LEAD-FREE SYMPOSIUM!
Chair: Paul Vianco, Ph.D., Sandia National Laboratories
Co-Chair: Matthew Kelly, P.Eng., MBA, IBM Corporation
Thursday, October 18 | 10:30am – 12:00pm | Australia 3

This course was developed by the Pb-free Electronics Risk Management (PERM) Consortium and is for engineers, managers and others involved in the manufacture and procurement of high performance electronic products. With a supply chain dominated by lead-free solder and parts, those in the Aerospace, Military, Automotive and Medical industries will learn state of the art practices to manage risks associated with lead-free technologies where sustained performance and/or functionality in harsh environments is necessary. Many of the Government Electronics and Information Technology Association (GEIA) documents will be referenced to review the following:

Requirements of a lead-free control plan

Influences and gaps for reliable assembly

Tin whisker risk mitigation

Supply chain management (dealing with COTs components/assemblies requirements flow down, etc.)

Rework and repair

In all subject areas, data sources will be supplied for reference or for those seeking further depth.

Dependable Electronics with Lead-Free Components/Systems — Overview
Linda Woody, Lockheed Martin Missiles and Fire Control

Dependable Electronics with Lead-Free Components/Systems — Test and Reliability
David Hillman, Rockwell Collins

Tin Whisker Risk Management for High Reliability Systems
David Pinsky, Raytheon Company

LF3

Dependable Electronics with Lead-Free Components/Systems

(Managing the Transition to a "Green World") Continued from LF2
Chair: Matthew Kelly, P.Eng., MBA, IBM Corporation
Co-Chair: Paul Vianco, Ph.D., Sandia National Laboratories
Thursday, October 18 | 1:00pm – 2:30pm | Australia 3

See LF 2 above for workshop overview.

GEIA-HB-0005-3, Rework/Repair Handbook to Address Implications of Lead-Free Electronics and Mixed Assemblies in Aerospace and High Performance Electronic Systems
*David Hillman, Rockwell Collins

Lead Free and Supply Chain Management for High Reliability Systems
David Pinsky, Raytheon Company

Review of Lead-Free Control Plan Requirements
Linda Woody, Lockheed Martin Missiles and Fire Control

LF4

Lead-Free Solder Joint Reliability: Meet the Experts - Assemblies in Aerospace and High Performance Electronic Systems

Chair: Jean-Paul Clech, Ph.D., EPSI Inc.
Co-Chair: Kola Akinade, Ph.D., Cisco Systems Inc.
Thursday, October 18 | 3:00pm – 5:00pm | Australia 3

Lead-free solder joint reliability remains a hotly debated topic. While some talk the talk, the speakers in this session walk the walk. Four experts, and their co-authors, will share important recent findings. Their papers address fundamentals such as lead-free solder properties (creep), accelerated testing procedures (thermal cycling and vibration), standard development & updates; and the impact of board / package design, materials and assembly parameters on lead-free solder joint reliability.

Systematic Investigation of Impact of SMT Parameters, Isothermal Aging and Alloy Microstructure on Lead-Free BGA Solder Joint Reliability
Weidong Xie, Ph.D., Tae-Kyu Lee, Steven Perng, Cisco Systems, Inc.

SnAgCu Lead-Free Electronics Reliability Under Combined Temperature and Vibration Environments
*Pradeep Lall, Ph.D., Geeta Limaye, Auburn University

Solder Alloy Creep Constants for Use in Thermal Stress Analysis
*Robert Darveaux, Ph.D., Corey Reichman, Amkor Technology, Inc.

Latest Developments in Testing Pb-free Electronic Assemblies: A Report on the Revision A Update to GEIA-STD-0005-3
Anthony Rafanelli, Ph.D., P.E., Raytheon Integrated Defense Systems

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