SMTA International  

Conference: Sep. 28 - Oct. 2, 2014  
Exhibition: Sep. 30 - Oct. 1, 2014  

Donald Stephens Convention Center  
Rosemont, IL  
 

Symposia

The following Evolving Technologies Summit and symposia feature paper sessions and panel discussions organized by industry experts, and they are included with either a VIP or Technical Conference registration.

Please note that speakers with a Speaker of Distinction icon are recognized as Speakers of Distinction. Over the past 15 years they have been identified by SMTAI attendees as giving the strongest technical presentations. Congratulations to each of these authors for a job exceptionally well done.



MONDAY

Evolving Technologies Summit
FREE with a VIP or Technical Conference Registration!
Organized by Reza Ghaffarian, Ph.D., Jet Propulsion Laboratories, Lars Böettcher, Fraunhofer IZM Berlin, and Steve Greathouse, Plexus Corp.
Monday, October 14
10:30am – 5:00pm | Room 203C

The time is right to stimulate your thinking and catalyze new success — be ready for the new market rise. Innovation always leads the way so join us as we explore emerging and evolving technologies from around the world. The 2013 ET Summit has the largest array of timely topics we've ever assembled. Learn the roadmaps and technology details from leaders of the industry on printed electronics, one of the most rapidly growing of microelectronics fields. Discussion on nanomaterials, a key ingredient enabling achieving characteristics for high throughput manufacturing will be featured. The keynote luncheon speaker will discuss another growing market in microelectronics advanced packaging, 3D/TSV, more than Moore, a need recognized by industry roadmaps answering limitation of implementing Moore's Law of ICs miniaturization. Then, learn all about rapidly growing needs for new and advanced materials and coating and processing, a key enabling for new technology advancement and answering the needs for heat dissipation of exotic processors. The Summit will end with the ET panel session, a highly attended and valuable ET technology information exchanges. The Panel will first present the status of new advanced technologies, and then discuss and debate timely topics that include: challenges in active-embedded technology, 3D technology, use of through silicon via (TSV), nanomaterials, EMS challenges, and Pb-Free for high reliability applications. Bring your questions and ideas as we power ahead into a brighter future.


ET1

Printed Electronics Technology Status and Implementation Challenges

Chair: Lee Smith, Plexus Corp.
Co-Chair: Lars Böettcher, Fraunhofer IZM Berlin
Monday, October 14 | 10:30am — 12:00pm | Room 203C

The printed electronics (PE) field is considered to be a compilation of diverse technologies leveraged from several well established industries - graphic arts printing, microelectronics, semiconductor, and nanotechnology- but we need the "out of the box" thinking in implementation. Thus, it is critical to discuss each aspect of these technologies to better define new applications. In this session, the first presenter will discuss various key mixes of technologies engulfing PE technology based on the industry survey and roadmaps. The other two presenters will provide detailed information on specific aspects, i.e. nanomaterials and assembly. Nanomaterials is a key ingredient in ink that enables achieving required characteristic needed for high throughput manufacturing through various printing medium. Assembly by new printing methods are key in successful implementation of the PE at low cost, the key advantage of printed electronics. Join us to learn to take advantage of this growing technology and learn which facets of technologies benefit your company

  • Overview of Industry Roadmaps for Printed Electronics
    Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
  • Commercialization of Nanomaterials and Printed Electronics
    *Alan Rae, Ph.D., NanoMaterials Innovation Center
  • Enabling of Key Manufacturing Platforms by Printed Electronics
    Girish Wable and Dan Gamota, Jabil Circuit, Inc.



    ET Keynote Lunch

    Emerging 3D and TSV Packaging Technology

    Charles Woychik, Ph.D., Invensas Corporation
    Monday, October 14 | 12:15pm — 1:15pm | Room 203C



    ET2

    Materials, Materials, Materials

    Chair: Irene Sterian, P.E., Celestica Inc.
    Co-Chair: Paul Vianco, Ph.D., Sandia National Laboratories
    Monday, October 14 | 1:30pm — 3:00pm | Room 203C

    We are still continuing to advance materials research and possibilities to address material shortages, as well as material benefits in product assembly and product function. In this session you will learn about the mining of rare earths and the opportunity to recycle these materials , whether nano-copper can be a replacement for solder, and whether hygroscopic silica gel can be used to dissipate high amounts of heat in short time periods. Material advances continue to improve our products!

  • Mining Electronics for Rare Earths
    *Alan Rae, Ph.D., ReNew Rare Earth, Inc.
  • NanoCopper as a Replacement for Solder-A Question of Reliability?
    Peter Borgesen, Ph.D., L. Wentlent, D.P. Schmitz, J. Owens, and R. Prattipati, Binghamton University; A.A. Zinn, E. Hauptfleisch, and D. Blass, Lockheed Martin
  • Silica Gel Coating for Thermal Management of Electronic Components
    Mathias Nowottnick, Felix Bremerkamp, and Dirk Seehase, University of Rostock



    ET3

    Evolving Technologies Panel Covering Key Technologies Including: Embedded Actives/Passives, 3D/TSV, Printed Electronics, Nanotechnology, Advanced Packaging, and Lead-Free Status

    Chair: Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
    Co-Chair: Paul Wang, Ph.D., Mitac International Inc.
    Monday, October 14 | 3:30pm — 5:00pm | Room 203C
    FREE BEER AND PRETZELS!

    Panelists and topics will include:
  • Embedded Active and Passive Technology
    *Lars Böttcher, Fraunhofer Institute for Reliability and Microintegration (IZM)
  • Advanced Packaging Technology
    *Lee Smith, Plexus Corp.
  • Nanotechnology and Rapid Growth
    *Alan Rae, Ph.D., nanoMaterials Innovation Center
  • EMS Challenges: Meeting New Technology Demand
    Irene Sterian, P.E., Celestica Inc.
  • 3D/TSV Packaging
    Charles Woychik, Ph.D., Invensas Corporation
  • Lead-Free and Reliability
    *Paul Vianco, Ph.D., Sandia National Laboratories







    Harsh Environments
    Organized by John Evans, Ph.D., Auburn University, and Pradeep Lall, Ph.D., Auburn University
    Monday, October 14 | 8:30am — 5:00pm
    Note: this symposium continues on Tuesday

    FREE with a VIP or Technical Conference Registration


    HE1

    Thermal Issues with Harsh Environment Electronics

    Chair: John Evans, Ph.D., Auburn University
    Co-Chair: Charles Bauer, Ph.D., TechLead Corporation
    Monday, October 14 | 8:30am — 10:15am | Room 202A

    This session investigates the challenges of increased temperature for harsh environment electronics. With increased power, reduction of space, and restricted airflows, designers have significant difficulties in meeting operational requirements for harsh environment systems. This session focuses on several solutions for these issues.

  • Thermal Management for FPGAs and 3D Stacks for Space Applications
    Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
  • Improved Prediction of Compressive Forces Required in Thermal Interface Pad Applications
    Jeff Jennings, Harris Corporation
  • New Interconnection for High Temperature Application: HotPowCon (HPC)
    Jörg Trodler, Heraeus Materials Technology GmbH & Co.KG, and Robert Bosch, A. Fix, and Mathias Nowottnick, University of Rostock



    HE2

    Modeling and Predictions in Harsh Operational Environments

    Chair: Tom Borkes, The Jefferson Project
    Co-Chair: Mike Nadreau, Henkel Electronic Materials LLC
    Monday, October 14 | 10:30am — 12:00pm | Room 202A

    Products that spend a lifetime in harsh operating environments provide the designer AND assembler with a unique set of challenges. The environmental stressing and corresponding reliability of the electronic components that confront the product designer are only a part of this challenge. Our assembly business of “making good solder joints” is confronted with daunting material and process challenges as well. A predictive model that can be validated empirically is the Holy Grail that would provide confidence in establishing a causal relationship between product design and MTBF. This session presents four papers that are significant contributions toward achieving that goal.

  • A Pseudo-Stress, Pseudo-Strain Methodology to Predict Lead-Free Solder Joint Reliability
    *Jean Paul Clech, Ph.D., EPSI, Inc.
  • Life Prediction of Lead-Free Electronics Under Simultaneous Automotive Environments of High Temperature and Vibration
    *Pradeep Lall, Ph.D., M.B.A., and Geeta Limaye, Auburn University
  • Design for Reliability with Computer Modeling
    *Randy Schueller, Ph.D., DfR Solutions



    HE3

    Power Electronics Packaging

    Chair: Pradeep Lall, Ph.D., Auburn University
    Co-Chair: Jean Paul Clech, Ph.D., EPSI, Inc.
    Monday, October 14 | 1:30pm — 3:00pm | Room 202A

    Increased emphasis on energy has resulted in the proliferation of power electronics in hybrid electric and fully-electric vehicles. Examples of automotive applications include the Toyota Prius Hybrid and the high profile launch of the Tesla Model S FEV. Power electronics modules in automotive applications often require high power dissipation and continued operation at high temperature. In this session several packaging technologies targeted for power electronics applications have been presented. Technologies discussed will include embedded components, sintering technologies and hypereutectic solder for die-attach.

  • Power Electronics Packages with Embedded Components-Recent Trends and Developments
    *Lars Böettcher,S. Karaszkiewicz, and A. Ostman, Fraunhofer IZM Berlin; D. Manessis, Technical University Berlin
  • Investigations for Sintering Technologies for Power Electronics
    *Hans-Juergen Albrecht, Siemens AG
  • Modified Hypereutectic Sn-Cu-Pb-free Solder for Power Semiconductor Die Attach
    *Keith Sweatman, Motanori Miyaoka, Takatoshi Nishimura, Nihon Superior Company, Ltd.; Xuan Quy Tran, Stuart McDonald, Kazuhiro Nogita, University of Queensland



    HE4

    Lead-Free for High Reliability Applications

    Chair: Scott Nelson, Harris Corporation
    Co-Chair: Debbie Carboni, Kyzen Corporation
    Monday, October 14 | 3:30pm — 5:30pm | Room 202A

    The use of lead-free solder for high reliability applications appears to be on the horizon but is still quite controversial. Papers in this session will focus on using lead-free solder for high performance electronic assembly and what can be done to improve long term reliability.

  • Enhancing Mechanical Shock Performance Using Edgebond Technology
    Steve Perng, TaeKyu Lee, and Cherif Guirguis, Cisco Systems, Inc.
  • Long-term Aging Effects on Reliability Performance of Lead-Free Solder Joints
    Zhou Hai, Jiawei Zhang, Ph.D., Chaobo Shen, Sivasubramanian Thirugnanasambandam, John Evans, Ph.D., M.J. Bozack, and Richard Sesek, Auburn University
  • High Strain Rate Properties of SAC105 and SAC305 Lead-Free Alloys after Extended High Temperature Storage
    *Pradeep Lall, Ph.D., M.B.A., and Sandeep Shantaram, Auburn University; David Locker, US Army RDECOM
  • Pb-Free and Halogen-Free Solder for High Reliability Applications
    Gavin Jackson, Ph.D., and Ian J. Wilding, Henkel Ltd.



    TUESDAY

    HE5

    Reliability of Pb-Free Electronic Products Subjected to Harsh Field Conditions

    Chair: Robert Kinyanjui, Ph.D., John Deere Electronic Solutions
    Co-Chair: Guhan Subbrayan, Ph.D., AsteelFlash
    Tuesday, October 15 | 2:00pm — 3:30pm | Room 202A

    Electronic products built for use in harsh environments must meet certain ruggedization tests including but not limited to exposure to programmed severe thermal-stresses, thermo-mechanical and vibrational tests. Pb-Free electronic products present an added challenge due to the requirement for high processing temperature. Thus, material selection, product design and development for Pb-Free products to be used in harsh environments must be guided by careful testing with an eye for survivability.

  • Solder/Metallization Interdiffusion - Case Studies
    Nausha Asrar, Ph.D., Schlumberger
  • Solder Crack Investigations in Real Cases
    Jose Servin Olivares and Cynthia Gomez, Continental
  • The Effect of Pb Mixing Levels on Solder Joint Reliability and Failure Mode of Backward Compatible, High Density Ball Grid Array Assemblies
    *Richard Coyle, Ph.D., Debra Flemming, Richard Popowich, and Peter Read, Alcatel-Lucent, Raiyo Aspandiar, Ph.D., Vasu Vasudevan, Ph.D., and Steve Tisdale, Intel Corporation; Iulia Muntele, Sanmina Corporation



    HE6

    Manufacturing for Harsh Environments

    Chair: Scott Priore, Cisco Systems, Inc.
    Co-Chair: Rod Howell, Libra Industries, Inc.
    Tuesday, October 15 | 4:00pm — 5:30pm | Room 202A

    In today’s world we need to understand many different factors that influence reliability of the products we build. One such factor is the product's ability to resist corrosion of various types. This session will address corrosion concerns with the solder alloys we use and how cleanliness effects the product reliability. The last paper will demonstrate the use of Weibull analysis to ensure we are accurately predicting our product's life expectancy meet the customer’s demands.

  • Corrosion Resistance of High Melting Lead-Free BiAgX Solder Joints
    Hongwen Zhang and *Ning-Cheng Lee, Ph.D., Indium Corporation
  • Copper Corrosion Effects from Cleaning Agent Entrapment
    David Lober and *Mike Bixenman, DBA, Kyzen Corporation; Linda Woody, Lockheed Martin
  • Using Weibul Analysis to Interpret Failure Data in Electronics Assembly Stress Testing
    *Ron Lasky, Ph.D., P.E., Indium Corporation







    THURSDAY

    Counterfeit Electronics Symposium
    Organized by Bill Cardoso, Ph.D., Creative Electron
    FREE with VIP or Technical Conference Registration!

    This new symposium will provide a forum to cover some aspects of changes in the electronic parts supply chain and how an organization performs part selection and management through the entire life cycle of the parts.

    PRC3

    New Technologies for the Detection of Counterfeit Components

    Chair: Robert Flores, Air Force Supply Chain Risk Management
    Co-Chair: Kaye Porter, GDCA, Inc.
    Thursday, October 17 | 8:30am — 10:00am | Room 204B

    Counterfeit components have been linked to disastrous consequences in applications ranging from medical to industrial electronic systems. The ubiquitous nature of counterfeit electronic components in our supply chain has greatly increased the need for counterfeit detection technologies. This session will explore new concepts and technologies being used today to find fake components before their insertion in final product.

  • Counterfeit Avoidance International Certification to AS 5553A, AS 6081, AS 6174
    Stanley Salot, Jr., ECC Corporation
  • JetEtch CuPROTECT and Copper IC Inspection
    Erik Jordan Nisene Technology Group
  • Data Fusion for Augmented Electronic Counterfeit Detection Efficacy
    Bill Cardoso, Ph.D., Creative Electron; Jose Barnabe, SpaceX



    PRC4

    Counterfeit Components and Supply Chain Management

    Chair: Bill Cardoso, Ph.D., Creative Electron
    Co-Chair: Erik Jordan, Nisene Technology Group
    Thursday, October 17 | 10:30am — 12:00pm | Room 204B

    The influx of counterfeit electronic components in our supply chain is an ever-increasing threat to our economy. The latest report issued by the US Department of Commerce states that the number of counterfeit incidents almost tripled between 2005 and 2008. This counterfeit threat is a ubiquitous problem that requires a serious overview of supply chain best practices. From military to commercial applications, counterfeit components have claimed billions of dollars in losses.

  • Simplifying the Complexities of Component Counterfeit Detection
    Dave Loaney, Premier Semiconductor Services, LLC
  • In Search of a Counterfeit Risk Mitigation Strategy: Lessons Learned in Review of the Current State of the Electronics Industry as Regards Counterfeit Mitigation Requirements for Suppliers
    Kevin Sink, TTI, Inc.
  • Legacy Management: Cross-Industry Sustaining Engineering and Managing Obsolescence Counterfeit Risk
    Kaye Porter, GDCA, Inc.







    Lead-Free Soldering Technology Symposium
    Organized by Paul Vianco, Ph.D., Sandia National Laboratories, and Matthew Kelly, P. Eng., MBA, IBM Corporation
    Thursday, October 17 | 8:30am — 5:00pm | Room 204A

    Free with a VIP or Technical Conference Registration!

    Consortia continue to play a key role in the advancement of Pb-free technology. These efforts are proving to be particularly crucial to both the consumer products as well as aerospace, defense, and high reliability sectors of the electronics industry as designers and process engineers develop Pb-free solutions for their product space. The 2013 SMTAI Lead-Free Symposium attendees will hear representatives from three such consortia describe their recent findings. The symposium kicks off with three presentations that address printed circuit board (PCB) topics currently at the forefront of Pb-free technology. The High Density Packing Users Group (HDPUG) will present on studies that examine the effects that higher Pb-free process temperatures on PCB reliability. Their efforts are improving our understanding of delamination, particularly in PCBs of high layer counts, as well as conductive Anodic Filament (CAF) growth as the first steps towards developing suitable mitigation strategies. The second session will have two presentations from the iNEMI consortium. The iNEMI scientists are continuing to document the performance of new Pb-free alloys. Findings will be presented that address, not only the properties of specific compositions, but also the synergistic effects of surface finishes and paste formulations. The follow-up talk considers the critical topic that always accompanies surface finish discussions, that being Au embrittlement. The third session of the symposium will have three presentations that describe the efforts within Universal Instrument’s Advanced Research in Electronics Assembly (AREA) consortium. The first talk examines the reliability of fine pitch assemblies using filled and un-filled microvia-in-pad technology. Next, a critical examination will be made of the explicit role that solder microstructure has on the reliability of Pb-free interconnections. The session will wrap up with a presentation that addresses the effects of reballing on fine pitch solder joint reliability. Lastly, the Symposium would not be complete without a session on Pb-free processing. The first presentation examines the impact of a nitrogen atmosphere on the quality of Pb-free solder joints. This topic has gained particular importance with the current changes in manufacturing cost models caused by fluctuations in the global energy markets. The second paper examines the latest advances in post-assembly probe testing. The symposium will be brought to a close with an excellent discussion of the next-generation of no-clean Pb-free pastes that target fine pitch applications.


    LF1

    Printed Circuit Board Technology in a Pb-free Electronics Industry: A Report by the High Density Packaging Users Group (HDPUG) Consortium

    Chair: Paul Vianco, Ph.D., Sandia National Laboratories
    Co-Chair: Matthew Kelly, P. Eng., MBA, IBM Corporation
    Thursday, October 17 | 8:30am — 10:00am | Room 204A

    The advent of Pb-free soldering technology has driven the printed circuit board (PCB) industry to pay closer attention to the effects of new materials and processes on the performance and reliability of current and next-generation laminates. The High Density Packaging Users Group (HDPUG) consortium is at the forefront of research activities that directly support the PCB supply chain in an effort to meet these objectives. Critical topics include the sensitivity of laminates to delamination and pad cratering as well as conditions that cause conductive anodic filament (CAF). The PCB manufacturing and process engineers are having to address these and other challenges for advanced laminate designs that have higher feature densities, ever-increasing layer counts, and survive Pb-Free second level assembly processes

  • Reliability Testing of PWB Plated Through Holes Using Interconnect Stress Testing Thermal Cycling Before and After Pb-Free Reflow Preconditioning
    Bill Birch, PWB Interconnect Solutions, Inc.
  • Impact of Pb-free Assembly on Laminate Electrical Performance for High Layer Count High Reliability PCBs
    Gary Long, Gary Brist,and Deassy Novita, Ph.D., Intel Corporation
  • Conductive Anodic Filament (CAF) Performance of PWB Materials Before and After Pb-Free Reflow
    Joe Smetana, Alcatel-Lucent, Kim Morton, Viasystems, and Thilo Sack, Celestica Inc.



    LF2

    Lead-Free Alloys, Surface Finishes, and Reliability Impacts

    Chair: Matthew Kelly, P. Eng., MBA, IBM Corporation
    Co-Chair: Paul Vianco, Ph.D., Sandia National Laboratories
    Thursday, October 17 | 10:30am — 12:00pm | Room 204A

    This session focuses on latest industry data reported by DfR Solutions and iNEMI relating to effects of gold embriddlement in lead-free interconnects and dwell time on SMT solder joint thermal fatigue performance using SnAgCu and alternate lead-free alloys. Examination of surface finish, alloy, cycle conditions, and microstructures will be reported.

  • iNEMI Pb-Free Alloy Characterization Project Report: Part V - The Effect of Dwell Time on Thermal Fatigue Reliability
    *Richard Coyle, Ph.D., Alcatel-Lucent, Richard Parker and Stuart Longgood, Delphi; Michael Osterman, CALCE; *Keith Sweatman and Keith Howell, Nihon Superior; *Elizabeth Benedetto and Aileen Allen, Hewlett Packard; Joelle Arnold, DfR Solutions
  • iNEMI Pb-Free Alloy Characterization Project Report: Part VI-The Effect of Component Surface Finishes and Solder Paste Composition on Thermal Fatigue of Sn100C Solder Balls
    *Richard Coyle, Ph.D., Alcatel-Lucent, Ricahrd Parker and Stuart Longgood, Delphi; *Keith Sweatman and *Keith Howell, Nihon Superior; Babak Arfaei, Universal Instruments
  • Gold Embrittlement in Lead-Free Solder
    Craig Hillman, Ph.D., Nathan Blattau, Joelle Arnold, Thomas Johnston, and Stephanie Gulbrandsen, DfR Solutions; Julie Silk and Alex Chiu, Agilent Technologies



    LF3

    Miniaturization Effects on Pb-free Process, Reliability, and Reworkability - AREA (Advanced Research in Electronic Assembly) Consortium

    Chair: Richard Coyle, Ph.D., Alcatel-Lucent
    Co-Chair: Keith Sweatman, Nihon Superior Company, Ltd.
    Thursday, October 17 | 1:15pm — 3:00pm | Room 204A

    As the transition to Pb-free manufacturing proceeds, the consumer electronics market continues to introduce new assembly and reliability challenges. These include implementing advanced, finer pitch devices, the PCB technology required to route those devices, and rework concerns for high cost devices. This session addresses some of the reliability and assembly challenges presented by these advanced packaging issues.

  • A Roadmap of Technology and Reliability Characterization
    *Denis Barbini, Ph.D., and Martin Anselm, Ph.D., Universal Instruments Corporation
  • Fine Pitch Reliability Comparisons Between Components Assembled on Motherboards With Filled and Unfilled Microvia-in-Pad
    Michael Meilunas and Martin Anselm, Ph.D., Universal Instruments Corporation
  • Effect of Sn Grain Morphology on Reliability of Lead-Free Solder Joints in Thermal Cycling Tests
    Babak Arfaei, Ph.D., and Martin Anselm, Ph.D., Universal Instruments Corporation, Shantanu Joshi, Sam Mahin-Shirazi, Eric Cotts, and Peter Borgesen, Ph.D., Binghamton University, James Wilcox, IBM Corporation; *Richard Coyle, Ph.D., Alcatel-Lucent, Ltd.
  • Fine Pitch Re-ball and Reliability
    Harry Schoeller, Ph.D., and Michael Meilunas, Universal Instruments Corporation



    LF4

    Actively Improving Your Soldering Process

    Chair: Dave Hillman, Rockwell Collins
    Co-Chair: Kola Akinade, Ph.D., Cisco Systems, Inc.
    Thursday, October 17 | 3:30pm — 5:00pm | Room 204A

    Today's soldering processes are in a state of consistent revision. New materials, changes in process consumables and new technologies offer a path forward in terms of making your soldering process more repeatable and consistent. This session focuses on three topic areas - next generation solder pastes, nitrogen reflow atmosphere, probe technologies - that could assist in improving your soldering process by producing fewer solder defects/ higher yield levels.

  • Next Generation No-Clean Lead Free Solder Paste Evaluation for Fine Pitch Applications
    Fei Xie, Ph.D., Daniel F. Baldwin, Ph.D., Paul N. Houston, and Brian J. Lewis, Engent, Inc.
  • Soldering in Nitrogen Atmosphere - Do Quality Aspects Justify the Costs?
    *Christian Ott, SEHO Systems GmbH; Heike Schlessmann, SEHO North America, Inc.
  • Probe Technologies to Improve First Pass Yields
    Brook Sandy-Smith, Indium Corporation; Brian Crisp, Everett Charles Technologies



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