October 4 - 8, 2009
The Town and Country Resort and Convention Center
San Diego, CA
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The following Evolving Technologies Summit and symposiums feature paper sessions and panel discussions organized by industry experts, and they are included with either a VIP or Technical Conference registration.
Please note that speakers with a icon are recognized as Speakers of Distinction. Over the past 15 years they have been identified by SMTAI attendees as giving the strongest technical presentations. Congratulations to each of these authors for a job exceptionally well done.
MONDAY
Evolving Technologies Summit
FREE with VIP or Technical Conference Registration
Organized by Reza Ghaffarian, Ph.D., Jet Propulsion Laboratories, Lars Boettcher, Fraunhofer IZM, and Steve Greathouse, Plexus Corporation
Monday, October 5
8:00am – 5:00pm, California
The time's right to stimulate your thinking and catalyze new success. Innovation always leads the way so join us as we explore emerging and evolving technologies from around the world. The 2009 ET Summit has the largest array of timely topics we've ever assembled. Learn how to detect and avoid counterfeit electronics - an increasing threat in tough times. Find out how new Nanotech materials and microwave curing are ready to solve packaging and PCB problems. Several experts will cover advanced packaging; System-in-Package (SiP), embedded chips, 3D stacking and Wafer-Level Packaging (WLP) Our international ET Panel will discuss and debate timely topics that include The Next 100 Years, "stretchable electronics", solar energy and extreme density electronics. So bring your questions and ideas as we power ahead into a brighter future.
ET1
Counterfeit Electronics-How to Screen for and to Fight!
Chair: Steve Greathouse, Plexus Corp.
Co-Chair: Reza Ghaffarian, Ph.D., Jet Propulsion Laboratory
Monday, October 5
8:00am–9:30am, California
Counterfeiting is clearly a growing problem in almost all industries, especially electronic products. Almost everyone is being affected by the counterfeiting problem in different ways. Whether you are a parts manufacturer, distributor, individual user, from the government and law enforcement agencies, legal professionals, authentication technology manufacturers, academic institutions, supply chain and brand protection professionals, you are affected. Many suppliers feel that counterfeiting is the number one issue that threatens the electronic supply chain, and corresponding profitability and liability for your products.
This session discusses the issues involved in avoiding, detecting, and preventing counterfeit products, how to screen for, and how to fight this spreading problem. The first paper in the session not only covers the techniques, but states the use of common sense for buyers: "If you get a quote that seems too good to be true, it probably is". The second paper provides a comprehensive review on methods for screening counterfeit electronic parts including use of visual, electrical tests, x-ray, VOM, and decapping. Examples of component authentication are also presented. The last paper comes from authors from the industrial and aerospace sectors providing challenges on detection of counterfeit electronics and how the industry is fighting the problem. Come and learn how to protect yourself and your company from this challenging issue that is consuming industry resources worldwide
Real or Fake? The Counterfeit Chip Conundrum
Dave Loaney, Premier Semiconductor Services
Screening for Counterfeit Electronic Components
Glenn Robertson, Stephen Schoppe, and Fabian Morales, Process Sciences, Inc.
An Industry United to Fight Counterfeiting
Daniel DiMase, Honeywell Technology Solutions Inc. and Phillip Zulueta, Jet Propulsion Laboratory
ET2
Nano Materials and Microwave Cure
Chair: Lars Boettcher, Fraunhofer IZM
Co-Chair: Thomas Loeher, Ph.D., Technical University of Berlin
Monday, October 5
10:00am – 12:00pm, California
Highly reliable and most cost efficient interconnects and surface finishes for IC substrates and PCB are essentially for the increased demands in electronic packaging. Nanotechnology based materials and processes can provide new approaches for the realization of the interconnects. Induced stress into the package by the curing of underfillers does also reduce the reliability and lifetime of electronic products. Conventional curing methods tend to induce high levels of stress into assemblies. A solution here can be the use microwave energy for the curing process. Both topics will be covered in this session and a broad introduction into these emerging technologies will be given.
Adhesion Mechanisms of Nano-Particle Silver Interconnects in Electronics Packaging Applications
Sung Chul Joo and Daniel F. Baldwin, Ph.D., , Georgia Institute of Technology
Nanotechnology for Lead-Free PWB Final Finishes
Nils Arendt, Enthone Inc., a business of Cookson Electronics
Warpage (co-planarity) Reduction for Flip-Chip Underfill Assemblies
Robert Hubbard, Lambda Technologies, Inc.
Unusual Cure Mechanisms of Thermoset Epoxy Resins in Microwave Fields
David Tyler, University of Oregon and Robert Hubbard, Lambda Technologies, Inc.
ET3
System in Package (SiP)
Chair: Thomas Loeher, Ph.D., Technical University of Berlin
Co-Chair: Irene Sterian, Celestica, Inc.
Monday, October 5
1:00pm – 2:30pm, California
Various technologies for the miniaturization of systems and modules attracted increasing interest for application and gained considerable process maturity during the last years. Depending on the application scenario, the technology of choice can be either advanced chip stacking using silicon through via technology to yield highly miniaturized modules, which can be assembled to a PCB substrate. On the other hand, direct single or multiple chip embedding into the printed circuit board bears the potential for cost effective fabrication of robust modules and substrate boards with very high functional density. Examples of both, silicone stacking and die embedding into PCBs, will be covered in the SiP session.
Wafer Level Packaging Technology Trends for CMOS Image Sensors
Andrew Perkins, Ph.D. , Swarnal Borthakur, and Marc Sulfridge, Aptina
Imbedded Die Assembly Process, Is It Ready Yet?
Jim D. Raby, P.E., Mark McMeen, and Casey H. Cooper, STI Electronics, Inc.
Innovative Package Realization by Chip Embedding Technologies
L. Boettcher , S. Karaszkiewicz, and A. Ostmann, Fraunhofer IZM; D. Manessis and H. Reichl, Technical University of Berlin
ET4
Evolving Technology and Current Issues Panel - FREE Beer and Pretzels!
Chair: Reza Ghaffarian, Ph.D. Jet Propulsion Laboratory
Co-Chair: Andrew Perkins, Ph.D., Aptina
Monday, October 5
3:00pm – 5:00pm, California
Come and join the team of industry experts to learn where the technology is heading and the current key issues in packaging, surface mount materials and manufacturing. Experts from industry will first present an overview of current and future technology, current status of solar and the SMT relationship, as well as a special presentation on Stretchable Electronics. Bring your challenging issues/questions from work to get answers from experts who provide unique perspectives based on their experience.
Panelists will include:
Ken Gilleo, Ph.D., ET-Trends LLC, (The Next Generation)
Thomas Loeher, Ph.D., Technical University of Berlin, (PCB Technologies for the Realization of Stretchable Electronic Systems)
Irene Sterian, Celestica Inc., (Solar Energy and SMT)
Charles Woychik, Ph.D., GE Global Research, (Advanced Packaging)
Steve Greathouse, Plexus Corp., (New/Evolving Technologies)
Lars Boettcher, Fraunhofer IZM, (European Packaging Activity)
WEDNESDAY
Contract Manufacturing Symposium
Organized by Mike Buetow, UP Media Group/Circuits Assembly Magazine
and Sue Mucha, Powell-Mucha Consulting, Inc.
Wednesday, October 7
1:30pm – 5:00pm, Royal Palms 1-2
FREE with VIP or Technical Conference Registration!
As outsourcing continues to be a growing trend in the electronics manufacturing industry, SMTA International provides the skills and information that you need to form profitable relationships. Whether you are a contract manufacturer, a customer, or an investor, you'll benefit from the Contract Manufacturing Symposium.
EMS1
Business Opportunities in Electronics Manufacturing Services
Chair: Mike Buetow, Circuits Assembly Magazine/UPMedia Group
Co-Chair: Rod Howell, Libra Industries
Wednesday, October 7
1:30pm – 3:00pm, Royal Palms 1-2
While EMS companies remain in the "business of making solder joints," they feel a steady pull by customers, potential customers and the lure of additional revenue to leverage their capabilities across other business pursuits. This session looks at some of the areas where EMS companies from a range of tiers have successfully transitioned to other product offerings -- including solar, fuel cell and repair services -- and other geographies.
How Sanmina-SCI Determined Its Alternative Energies Strategy
Sundar Kamath, Ph.D., Sanmina-SCI
Overcoming Repair Depot Challenges
Greg Bannick, Kimball Electronics Group, Medical Product Solutions
Developing a Robust Offshore Program Management Model
Susan Mucha, Powell-Mucha Consulting, Inc.
EMS2
Addressing EMS Management Challenges in a Changing World
Chair: Sue Mucha, Powell-Mucha Consulting, Inc.
Co-Chair: Chelsey Drysdale, Circuits Assembly Magazine
Wednesday, October 7
3:30pm – 5:00pm, Royal Palms 1-2
FREE with VIP or Technical Conference Registration!
This session looks at three key areas of strategy development in EMS: ensuring efficient linkage in product development, addressing the challenge of counterfeit products, and exploring opportunities to expand into the solar energy market.
Creating a Robust Design Interface
Craig Arcuri, Alta Manufacturing
Brand Protection Beginning at WIP?
James Williams, Ph.D., Polyonics, Inc.
M&A Opportunities in the Solar Energy Market
Chaim Lubin, Lincoln International
THURSDAY
Lead-Free Soldering Technology Symposium
Organized by Paul Vianco, Ph.D., Sandia National Laboratories and Matt Kelly, IBM Corporation
Thursday, October 8
8:00am – 5:00pm
Free With VIP or Technical Conference Registration
Lead-free soldering technology continues to experience a broad range of research, development, and implementation activities worldwide. It is critical that fundamental information be shared across the electronics industry in order to assure successful product cycles from design, through manufacturing, and finally reliable service performance. At the present time, topics of particular technical interest are the influx of alternative solder alloys and, secondly, assessing the long-term reliability of Pb-free solder interconnections. This year's Lead-Free Soldering Technology Symposium will begin with an overview of Pb-free processing and reliability investigations underway at England's National Physical Laboratory (NPL). The NPL has been clearly one of the leading institutions in Pb-free technology within the EU. The second session will examine the performance variables of new Pb-free solder alloys. The iNEMI consortium has an extensive alternate alloys study underway; the results of those efforts will be reported upon at the symposium. Similarly, papers from Siemens AG and University of Rostock will describe important reliability studies being performed on alternative solders. The ever-popular case studies session will follow the alternative alloys papers. Featured case studies describe the challenges facing producers tasked with implementing Pb-free solders on high-reliability assemblies having a high mix of component types. The symposium will conclude with a very interesting reliability session. This year's symposium session includes two papers that examine dwell time effects on the thermal fatigue results of Pb-free solders. A review will also be presented describing data obtained from "mild" thermal fatigue tests (-20/80C) performed as part of the JCAA/JG-PP Lead-Free Solder Project. The closing paper will address one of the most important issues facing Pb-free reliability testing – determination of acceleration factors.
LF1
National Physical Laboratory Report and Update
Chair: Matt Kelly, IBM Corporation
Co-Chair: Paul Vianco, Ph.D., Sandia National Laboratories
Thursday, October 8
8:00am – 9:30am, Garden Salon 1
Manufacturing high reliability lead-free circuit assemblies is challenging, and understanding the pitfalls and knowing material properties is clearly desirable. This presentation will address a wide range of issues, which include material and processing properties. Examples include: copper dissolution in selective soldering, tin whisker and work at NPL which has developed a special test vehicle that provides a sensitive test to measure the mitigation properties of conformal coatings, substrate reliability of PTH, solder joint reliability measurements will be discussed and the use of mechanical measurements of joint sized solder samples. The controlling factors in the occurrence of tin pest will also be presented.
Implementation and Reliability Issues With Lead-Free Solders
Christopher Hunt, Ph.D., National Physical Laboratory
LF2
Properties of Alternative Pb-Free Solders
Chair: Paul Vianco, Ph.D., Sandia National Laboratories
Co-Chair: Kola Akinade, Ph.D., Cisco Systems
Thursday, October 8
10:00am – 12:00pm, Garden Salon 1
As Pb-free interconnection technology gains an increasing foothold in the electronics industry, performance shortfalls are now being documented for many alloys, which only a few years ago, were the leading candidates for many consumer and high-reliability applications. It is becoming apparent that a "single" replacement for the SnPb eutectic solder may not be feasible for all hardware applications. This session describes the efforts underway within consortia as well as at individual institutions to document the performance characteristics of new Pb-free solder compositions. These studies are providing critical data to the electronics community in order that smart choices can be made as to the most suitable Pb-free solder to be used in particular applications, from consumer desktop products to high-reliability systems operating in harsh service environments.
Pb-Free Alloy Alternatives: Reliability Investigation
Hans-Juergen Albrecht , Siemens AG
iNEMI Lead-Free Alloy Alternatives Project Report: Thermal Fatigue Experiments and Alloy Test Requirements
Gregory Henshall, Ph.D. , Hewlett-Packard; Keith Sweatman and Keith Howell, Nihon Superior Co. Ltd.; Joe Smetana and Richard Coyle, Ph.D. , Alcatel-Lucent; Rich Parker, Delphi; Steve Tisdale and Fay Hua, Ph.D. , Intel Corporation; Weiping Liu, Ph.D., Indium Corporation; Rob Healey and Ranjit Pandher, Cookson Electronics; Derek Daily, Senju Comtek Corporation; Mark Currie, Henkel Technologies
Processing and Reliability of Low-Silver-Alloys
Mathias Nowottnick, University of Rostock
Joint Properties of Sn3.5Ag Solder Balls Contained Carbon Nanotubes
Chang-Woo Lee, Young-Ki Ko, Jung-Hwan Bang, Sehyung Lee, Yun-Ki Sa, Korea Institute of Industrial Technology; Sehoon Yoo, KITECH
LF3
Lead-Free Product Design Qualification: Understanding the Complete Material and Process Picture
Chair: Dave Hillman, Rockwell Collins
Co-Chair: Keith Sweatman, Nihon Superior
Thursday, October 8
1:00pm – 2:30pm, Garden Salon 1
The qualification of a lead-free product requires a product design team to understand not only the component selection and material qualification but the interaction of the design materials with the lead-free soldering process. A thorough assessment and understanding of a products components, laminates, process materials and process procedures results in a high yield, rugged product design that meets the customer requirements. This session focuses on the entire materials & process assessment: the impact of lead-free process on printed wiring board laminate, the interaction of process materials on solder joint integrity and the use of product test vehicle (PTV) methodology for lead-free product design assessment.
Conductive Anodic Filament Study: Laminates and Pb-Free Processing
Randal Ternes, Boeing
The Solder Joint Reliability of WLCSP Components Under Influence of Conformal Coating
Jyri Salminen, Ph.D., Nokia Corporation
Lead-Free Assembly and Qualification of a Storage Class PCBA
Matthew Kelly and Tom Truman, IBM Corporation; Adzahar Samat, Eric Goh, SH Tan, Ali Villanueva, MS Tan, and SJ Lee, Venture Corporation, Ltd.
LF4
Impact of Thermal Cycling and Aging Conditions on Lead-Free Solder Joint Reliability Assessment
Chair: Jean-Paul Clech, Ph.D., EPSI, Inc.
Co-Chair: Kola Akinade, Ph.D., Scientific Atlanta, A Cisco Company
Thursday, October 8
3:00pm – 5:00pm, Garden Salon 1
The choice of thermal cycling conditions has a significant impact on accelerated test results, their interpretation and, ultimately, on the assessment of lead-free product solder joint reliability. Presenters in this session feed the debate on appropriate test conditions for lead-free assemblies with hard data and analysis. Test and modeling results are presented that are of use to quantify the effect of temperature extremes, dwell times, and aging conditions on the attachment reliability of both SnPb and lead-free assemblies.
The first paper investigates the performance of lead-free and SnPb assemblies under milder conditions (-20 to 80C) than in conventional accelerated testing. The next two papers provide quantitative insight in the sizable effect of dwell times on accelerated thermal cycling results, including the effect of pre-conditioning (aging), for both SnPb and SAC assemblies. The last paper presents a closed-form, strain-energy based, acceleration factor model that correlates solder joint failure times under a variety of harsh and mild conditions with different cold and hot dwell periods. The proposed framework to develop acceleration factor models is applied to SnPb and SAC305 assemblies.
JCAA/JG-PP Lead-Free Solder Project: -20°C to +80°C Thermal Cycle Test
Thomas Woodrow , Ph.D., Boeing
Effect of Dwell Time on the Life of Lead-Free BGA Joints in Thermal Cycling
P. Borgesen and E. Al-Momani, State University of New York at Binghamton; M. Meilunas, Unovis Solutions
Dwell Time, Microstructural Dependencies, and the Interpretation of Thermal Fatigue Test Data of SnPb and Pb Free Solders
Richard Coyle, Ph.D. , Peter Read, Debra Fleming, and Richard Popowich, Alcatel-Lucent; John Osenbach, Jeff Punch, and Maurice Collins, Stokes Institute-University of Limerick; Michael Reid, LSI, Corporation; Heather McCormick , Celestica Inc.; Steven Kummerl, Texas Instruments; and Indraneel Chatterji, Flextronics International
Closed-Form, Strain-Energy Based Acceleration Factors for Thermal Cycling of Lead-Free Assemblies
Jean-Paul Clechm Ph.D., , EPSI, Inc.; Greg Henshall, Ph.D ., and Jian Miremadi, Hewlett-Packard
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