International Wafer-Level Packaging Conference 2009 Proceedings

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    TITLE AUTHOR DOWNLOAD
    ARE WE READY FOR NEMS? Alan Rae  Purchase 
    ADVANCED CHIP TO WAFER BONDING ENABLING SILICON IN PACKAGE (SIP) PRODUCTION WITH LOWEST COST OF OWNERSHIP Alfred Sigl, et al.  Purchase 
    SMARTPHONE HANDSET INFLUENCES ON WAFER LEVEL PACKAGING TRENDS Anthony P. Curtis, Theodore (Ted) G. Tessier and Jay Hayes  Purchase 
    ENCAPSULATION OF THE NEXT GENERATION ADVANCED MEMS & SENSOR MICROSYSTEMS Arnold Bos, Lingen Wang and Ton van Weelden  Purchase 
    EFFECT OF BONDING PROCESS PARAMETERS ON THE INTERFACIAL PROPERTIES OF Cu-Cu DIRECT BONDS FOR TSV INTEGRATION Bioh Kim, et al.  Purchase 
    BRAIDED ELECTRICAL CONTACT ELEMENT BASED FINE PITCH TEST SOCKET AND PACKAGE ATTACH Che-Yu Li, Ph.D., SM Low and Jason Goh  Purchase 
    PRESSURE INDICATING FILM CHARACTERIZATION OF PRESSURE DISTRIBUTION IN EUTECTIC AU/SN WAFER-TO-WAFER BONDING D. Spicer, et al.  Purchase 
    WAFER THICKNESS SENSOR (WTS) FOR ETCH DEPTH MEASUREMENT OF TSV David Marx, et al.  Purchase 
    ADVANCED TEMPORARY AND PERMANENT BONDING TECHNOLOGY Dustin Warren, Bioh Kim, Thorsten Matthias, Markus Wimplinger and Paul Lindner  Purchase 
    THROUGH SILICON VIA PASSIVATION USING A SPRAY COATING APPROACH Dustin Warren, Mike Sexton, Thorsten Matthias, Paul Lindner and Markus Wimplinger  Purchase 
    FLIP CHIP HERMETIC PACKAGING FOR MEMS Eric Cadalen, et al.  Purchase 
    DEVELOPMENT OF WAFER LEVEL PACKAGE (WLP) OF NORMAL AND HIGH PIN COUNT DEVICES FOR MOBILE APPLICATIONS In-Soo Kang, Jun-Kyu Lee, Gi-Jo Jung, Yun-Mook Park and Byeung-Gee Kim  Purchase 
    OPTIMIZATION OF WAFER LEVEL TEST HARDWARE USING SIGNAL INTEGRITY SIMULATION Jason Mroczkowski and Ryan Satrom  Purchase 
    TOOLING INFLUENCE ON STENCIL PRINT COATING UNIFORMITY FOR 150um THICK 200mm WAFERS Jeff Schake, Mark Whitmore, Dave Foggie and Michael Brown  Purchase 
    KELVIN CONTACTORS FOR WAFER-SCALE TEST Jim Brandes  Purchase 
    WAFER > WLCSP > MULTI-DIE CSP FABRICATION AND USE OF WAFER LEVEL CHIP SCALE PACKAGING Jim Rates  Purchase 
    CAN CURRENT EDA PACKAGING TOOLS MEET THE DEMANDS OF EVER-CHANGING 3D PACKAGING TECHNOLOGIES? John Sovinsky  Purchase 
    APPLYING A CODESIGN METHODOLOGY FOR EFFICIENT PACKAGE-ON-PACKAGE (POP) DESIGN Kevin Rinebold  Purchase 
    RESIST REMOVAL SOLUTIONS IN ADVANCED PACKAGING APPLICATIONS Kimberly Pollard, Diane Scheele, Gene Goebel, Mike Phenis, Nichelle Wheeler and Allison Rector  Purchase 
    INNOVATIVE EMBEDDED-CHIP QFN PACKAGE REALIZATION L. Boettcher , et al.  Purchase 
    THROUGH SILICON VIA ETCHING WITH PRECISE PROFILE CONTROL Leslie M. Lea, D. Phil.  Purchase 
    STRETCHABLE SILICON ELECTRONICS M. Bartek, T. Zoumpoulidis and S. Sosin  Purchase 
    CLEANING INTEGRATED CIRCUIT PACKAGES Mike Bixenman, D.B.A.  Purchase 
    THREE DIMENSIONAL WAFER LEVEL CHIP SCALE PACKAGING: PROCESS DEVELOPMENT AND 3D INTERCONNECTION EVALUATIONS Paul N. Houston, et al.  Purchase 
    ADVANCES IN WLCSP TECHNOLOGIES FOR GROWING MARKET NEEDS R. Anderson, et al.  Purchase 
    ADVANCING WAFER LEVEL PACKAGING TECHNOLOGY BY USING PARYLENES Rakesh Kumar  Purchase 
    COPPER PILLAR AND MICRO BUMP INSPECTION REQUIREMENTS AND CHALLENGES Reza Asgari  Purchase 
    A NEW DIMENSION IN PACKAGING: INTEGRATED MODULE BOARD TECHNOLOGY Risto Tuominen  Purchase 
    LITHOGRAPHY CHALLENGES AND CONSIDERATIONS FOR EMERGING FAN-OUT WAFER LEVEL PACKAGING APPLICATIONS Robert L. Hsieh, et al.  Purchase 
    REDUCED WAFER WARPAGE AND STRESS IN JSR DIELECTRIC FILMS Robert L. Hubbard, Iftikhar Ahmad and Keith Hicks  Purchase 
    NEW MATERIALS AND PROCESS FOR 3D INTEGRATION Robert S. Forman  Purchase 
    ALL-SURFACE INSPECTION FOR 3D-INTERCONNECTS AND TSV MANUFACTURING Rolf Shervey  Purchase 
    RELIABILITY OF 400 MICROMETER PITCH WLCSP ASSEMBLIES WITH SOLDER SUPPORTING MATERIAL Russell Stapleton, Ph.D., et al.  Purchase 
    AN INVESTIGATION INTO THE REQUIREMENTS FOR HIGH RELIABILITY FLIP CHIP APPLICATIONS Scott Popelar, Ph.D. and Sean Thorne  Purchase 
    eWLB (EMBEDDED WAFER LEVEL BGA) TECHNOLOGY: NEXT GENERATION 3D PACKAGING SOLUTIONS Seung Wook Yoon and Meenakshi Padmanathan  Purchase 
    COMBINING WAFER BONDING TECHNIQUES TO IMPROVE WAFER LEVEL INTEGRATION Shari Farrens, Ph.D.  Purchase 
    PREVENTING BUBBLE DEFECTS AND YIELD EXCURSIONS DURING POLYIMIDE LITHOGRAPHY Shiho Inui and Jennifer Braggin  Purchase 
    COLLIMATED PVD FOR TSV BARRIER-SEED DEPOSITION Stephen Golovato, George Seryogin and Daniel Goodman  Purchase 
    INCREASING 3D SYSTEM LEVEL INTEGRATION EFFICIENCY AND MECHANICAL ROBUSTNESS BY EMBEDDING WLCSPS WITHIN PRINTED WIRING BOARD ASSEMBLIES Theodore G. Tessier, et al.  Purchase 
    FACTORS INFLUENCING SEMICONDUCTOR PACKAGE MIGRATION Tom Strothmann and Kevin Kan  Purchase 
    WAFER-LEVEL PROCESS SAMPLING, METROLOGY AND TESTING FOR MEMS AND SOLAR PHOTOVOLTAIC APPLICATIONS Vinh Van Ngo, Ph.D., et al.  Purchase 
    STRUCTURES AND ELECTRICAL PERFORMANCE OF THROUGH STRATA VIAS (TSVS) Zheng Xu, Adam Beece, Kenneth Rose and James J.-Q. Lu  Purchase 

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