Journal of SMT Article

WORLD WIDE DEPLOYMENT OF CSP ASSEMBLY PROCESS CSP STRESS/STRAIN ENERGY DISTRIBUTION MODELING AND FATIGUE RESISTANCE STUDY

Authors: Dr. Shelgon Yee and Dr. Paul Wang
Company: Solectron Corporation
Date Published: 7/1/2000   Volume: 13-3

Abstract: During the last few years, the Solectron Technical Center has conducted a series of CSP board level manufacturing assessment studies on the self-centering effect during reflow and rework, component placement accuracy requirement, and the effects of pad design and surface finishes. Based on the results of these studies, a standard CSP assembly procedure was established. This procedure is being deployed to all Solectron manufacturing sites and is used to assess each site’s CSP assembly readiness. This deployment strategy allows the corporate technology group to assess the technical capability of all Solectron sites to fulfill our commitment to enforce common process on the global basis.

This paper will describe the methodology used for the deployment of the CSP assembly process. A test vehicle optimized by incorporating all the findings from the studies on pad geometry, solder volume, and surface finish was designed to assess the reliability of CSP after SMT assembly and rework processes. A series of analyses was performed on the test vehicle including the use of the Mechanical Deflection System designed by IBM to study the reliability of solder joints. Correlation between fatigue resistance, crack pattern, and their impact on the reliability of solder joint were also established.

Stress and displacement under external thermal and mechanical fields were simulated. Finite Element Method was used to analyze the Von Mises stress and strain energy distributions. The impact of package standoff, die size, and DNP on the fatigue resistance and reliability of solder will be discussed.



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