Journal of SMT Article

INTERCONNECT RELIABILITY OF MICRO BGA AND CHIP SCALE PACKAGES

Author: M. Avery et al.
Company: Nortel Networks
Date Published: 7/1/1999   Volume: 12-3

StenTech

Abstract: The demands for high speed, increased circuit density and greater thermal dissipation are becoming critical to state of the art networking technology. At the same time, the convergence of voice and data networks is requiring data network products to achieve even higher levels of quality and reliability.

The goal of this study was to provide a highly reliable set of manufacturing guidelines and a high-density printed circuit board (PCB) routing strategy for the micro ball grid array (micro BGA) and chip scale packages (CSPS) under review.

A daisy chained PCB test vehicle was designed which included microvia, via-in-pad, and dog bone routing strategies. Various area array package types with component pitches from 0.5mm to 1.0mm were laid out on the test vehicle.

The PCBs were constructed using plasma, photo defined, and laser-ablated microvia processes. Boards were assembled using the results of designed experiments that were performed for the stencil printing process. An extensive reliability test plan was developed and implemented with an external full service testing laboratory. Exhaustive failure analysis was performed on the defects identified.

Key Words: Microvia, reliability, micro BGA, chip scale package, via-in-pad, routing strategy.



Cost to download:

  Members: Free! (Log on to receive the member rate)
  Non-Members: $10

Why become an SMTA member?

Not a member yet? Join SMTA today!

Notice: Sharing of articles is prohibited. Downloaded papers must only be stored on a local hard drive and not in a shared repository either internal or external.


Back


SMTA Headquarters
6600 City West Parkway, Suite 300
Eden Prairie, MN 55344

Phone 952.920.7682
Fax 952.926.1819
Home
Site Map
Update Your Info
Related Links
Send Us Feedback
Contact Us
Privacy Policy
↑ Top