Webinars and Webtorials

Overview:
This course will take an in depth view of the applications, market requirements, supply chain infrastructure and technologies associated with the BGA package stacking platform commonly referred to as package on package (PoP).

What will you learn:
This course will help you decide when and how, PoP technology can provide system level semiconductor integration benefits. How you can evaluate and select the optimum PoP technology for you applications by understanding the complex mix of cost, performance and business / logistic benefits PoP provides. Where industry standards, device floor-planning and supply chain infrastructures can reduce the total cost or time to market when implementing a PoP solution. How the PoP platform aligns with industry roadmaps to meet the higher density challenges associated with next generation device integration and system design requirements. What the key PoP design related parameters are and how they relate to package sizing and selection.

PoP Technologies and Infrastructure covered will include:
An introduction to Package on Package (PoP) terminology, a review of the historical progression of packaging from 1D to 3D. A comparison of Stacked die to Stacked Package (PoP) to Package-in-Package (PiP) will be covered. A section of the course will review the technical and business / logistic factors that make up the total cost of ownership benefits which has been major driver of broad industry adoption of the PoP technology.

The course will explore the critical role industry infrastructure development and JEDEC standards have played in the high rates of PoP adoption in mobile multimedia applications.

We will look at design related items: PoP net hierarchy and functional test considerations. Next we will study how warpage affects project parameters for mounting yield and have a review of the various PoP surface mount stacking methods.

We will review some industry generated data for PoP including board level reliability data and a case study of an advanced 2-sided PoP package combining copper pillar flip-chip technology with TMV®.

Who Should Attend:
Engineers, managers and executives involved in future R&D investments, assembly and product development of electronic packaging, and wanting fundamental understanding of PoP technologies, as well as the materials and equipment suppliers wanting to know about the existing and future PoP integration technologies and options, will greatly benefit from this course.

Bio:
Moody Dreiza currently has responsibilities in the field of product management associated with Amkor Technology’s stacked package(PoP) and Copper Pillar product lines. Moody’s previous experience includes four years in Amkor’s design center supporting CSP and PBGA design and design tool automation.

Moody has earned a Bachelor’s degree in Mechanical Engineering from the University of Manchester Institute of Science and Technology (UMIST) in Manchester, England.

Overview
There is a well known problem in the electronics industry with no-clean flux residues and the after effects it can have on reliability. If the fluxes are not fully complexed after reflow or completely removed after the wash process, there are a number of failure mechanisms attributed directly to the flux. There is a tendency for the no-clean flux to become entrapped under low standoff parts and parts with very tight spacing such as BGA’s, QFN’s, and other similar type components.
Potential issues include, partially activated flux residues; localized cleaning that has created a trapped surface residue and other unseen issues. We will also look at the types of failure modes directly related to improperly processed flux residues. Proven cleaning methods for no-clean flux will also be discussed with a focus on both cleaning at time of original manufacturing as well as recovery cleaning for hardware that was improperly processed during the original build.

Who Should Attend
Directors of quality, program managers, really anyone that has a desire to produce PCBA's with as little process residue as possible.

About The Presenter
Eric Camden is a Lead Investigator at Foresite, Inc., an analytical testing and consulting laboratory. Over the past 13+ years, Eric has worked with many large OEMs and contract manufacturing companies optimizing their manufacturing processes and assisting with the identification of electronic hardware failures utilizing various analytical techniques. He is active in industry-related organizations and speaks regularly at many industry conferences around the world. He is also a J-STD-001 and IPC-A-610 certified instructor trainer as well as IPC-A600 certified specialist.

Overview:
This webinar was developed by Doug Pauls, Rockwell Collins, and Jason Keeping, Celestica. A broad overview of conformal coating types is presented, but the focus of the webinar is on the use and control of conformal coating in the factory. Topics covered include coating application tools and methods, coating cure methods, common defects and their causes, and popular myths and misconceptions. The course assumes no prior knowledge of conformal coating.

What You Will Learn:

Overview:
Radiography is a well established technique widely utilized for quality control and assurance. In this workshop we will focus on modern radiography techniques and how they have been deployed in a wide range of applications ranging from the inspection of failures in printed circuit boards (PCB) to the detection of counterfeit components. The workshop will introduce the definition and terminology associated with digital radiography. A complete review of the components and procedures of a radiography system will also be covered. We will study the importance of process control as the key to image fidelity, as well as indicators and image attributes. Two of the critical subsystems in every radiography system paramount to good image resolution are the detectors and x-ray sources. Thus, we will examine key systematic image quality parameters including source power, focal size, beam angle, and camera pixel size, exposure time, resolution, and dynamic range. The scope of the first part of the workshop includes the introduction and general definition of radiography with several examples. The second part of the workshop will cover key applications of radiography: PCB inspection and counterfeit detection.

Topics Covered:

Overview:
Businesses today face mounting pressures to solve resource issues, control costs, and better manage information. Finding ways to actually enable efficiency and productivity remains a challenge for many companies. Top companies with successful track records of significant continuous improvement have discovered one possible solution called Lean Six Sigma methodology. Lean Six Sigma, (LSS) is a relatively unknown approach to most companies. It can do more than simply improve processes, but also assist you in achieving unprecedented operational excellence. When deployed throughout the organization as “the method to do business”, it can help leaders discover a range of opportunities far beyond operations. This would include enhanced financial performance, increased customer satisfaction, improved branding and an organization that has an inherent desire to grow and innovate.

Objectives:

Overview:
The reflow soldering process is a key process in surface mount electronics assembly after stencil printing process. The soldering parameters influence the quality of the solder joint in a surface mount PCB assembly. This course will provide a thorough understanding of the reflow process for tin-lead and lead free soldering. Topics include an in-depth look at the various soldering methods, mechanism for solder joint formation, intermetallic formation, reflow parameters, effect of reflow parameters, thermocouple attachment and profiling, importance of profiling, defect identification and corrective action. Participants in this course are sure to acquire a sound understanding of the soldering process and its influence on assembly yield.

Objectives: